BAE Systems Achieves 80% Reduction in Software-Defined Radio Development Time
- Project development time reduced by 80%
- Problems found and eliminated faster
- Clocking and interfacing simplified
The U.S. military is expected to spend more than $1 billion on software-defined radio (SDR) technology over the next few years to ensure better communication and interoperability among troops. To meet the demand, defense contractors are exploring improved design approaches for rapidly developing multimode, multiband, and multifunctional wireless devices that can be reconfigured with software updates.
Long at the forefront of SDR technology, BAE Systems has traditionally used a design flow that relied on hand-coding FPGAs in VHDL®. Recently, however, BAE Systems saw an opportunity to evaluate this approach against Model-Based Design using MathWorks and Xilinx® tools. Running two SDR waveform development efforts in parallel, they found that Simulink® and Xilinx System Generator dramatically reduced development time.
“Using Simulink, we completed all simulation and debugging in the model, where it is easier and faster to do, before automatically generating code with Xilinx System Generator,” explains Dr. David Haessig, senior member of technical staff at BAE Systems. “As a result, we demonstrated more than a 10-to-1 reduction in the time to develop the signal processing chain of a software-defined radio. This really illustrates the potential for improving development production in SDR applications.”
BAE Systems was tasked with developing a military standard (MIL-STD-188-165A) satellite communications waveform for implementation in a command, control, communications, computers, intelligence, surveillance, and reconnaissance (C4ISR) radio. At the same time, BAE Systems sought to evaluate a new design flow for reducing development time.
The company would run two simultaneous development efforts—one using a traditional design flow and the other using tools for Model-Based Design. To ensure a fair comparison, each effort would use an equivalent set of cores. Running the two projects in parallel would enable BAE Systems to directly evaluate its existing approach with Model-Based Design on a real-world project.
Working with Xilinx, BAE Systems applied Model-Based Design using Simulink and Xilinx System Generator to design and deploy an MIL-STD-188 SDR waveform 10 times faster than with their hand-coding approach.
Concurrent with that effort, Robert Regis, a BAE Systems engineer with more than 15 years of VHDL and software experience, led a separate project using a traditional design flow. In this project, Regis hand-coded VHDL based on requirements and specifications developed during a distinct systems engineering phase.
On the project involving Model-Based Design, Andrew Comba, a system engineer at BAE Systems, first developed a model of the SDR transmitter and receiver in Simulink. He accelerated model development by incorporating blocks from Communications Toolbox™, including a scrambler, differential encoder, Reed-Solomon encoder, matrix interleaver, convolutional encoder, and quadrature amplitude modulation (QAM) modulator.
Comba handed the Simulink model off to Xilinx engineer Sean Gallagher with a copy of the waveform specifications. Gallagher, who started the project with no significant communications systems experience, prepared the model for automatic code generation using Xilinx System Generator by substituting Xilinx blocks for standard Simulink blocks.
After simulating and verifying the updated model using data visualization scopes and bit-error rate meters, Gallagher used Xilinx System Generator and Xilinx ISE to automatically generate VHDL code for the SDR and deploy it to an FPGA for testing.
“Because the design was fully simulated and verified using the model, when downloaded to the FPGA, the SDR implementation worked immediately,” notes Haessig.
Based on the success of this project’s initial effort, BAE Systems has begun a joint effort with MathWorks, Virginia Tech, Xilinx, and Zeligsoft to improve waveform portability. This group is developing an interface that enables code generated by Simulink Coder™ or Xilinx System Generator to be directly incorporated into Software Communications Architecture (SCA) radios.
Project development time reduced by 80%. “Using Simulink and Xilinx System Generator we designed and developed the signal processing chain of the SDR and achieved a 10-to-1 reduction in development time,” says Haessig. “Overall project time, including hardware integration and lab testing, was reduced by more than 4-to-1.”
Problems found and eliminated faster. “With Model-Based Design, the Simulink model is directly connected to the resulting code. This forces the developer to capture all the required waveform details in the model,” notes Haessig. “As a result, bugs are discovered and removed early in the design flow at the modeling stage, not later at the VHDL behavioral test stage, which can be difficult and time consuming.”
Clocking and interfacing simplified. The traditional design flow required engineers to generate all clock timing by hand and to carefully examine the specifications and interface requirements for each component in the waveform. Haessig notes, “With Simulink and Xilinx System Generator, all the necessary clocking signals are generated automatically, and components are easily connected, without studying the spec sheet for details concerning control, timing, and other options.”