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HDL Language Support and Supported Third-Party Tools and Hardware

VHDL, Verilog, and SystemC HLS Language Support

The generated HDL code complies with the following standards:

  • VHDL-1993 (IEEE® 1076-1993)

  • Verilog-2001 (IEEE 1364-2001)

  • SystemVerilog-2005 (IEEE 1800-2005)

  • SystemC 2.3 (IEEE 1666-2011)

Third-Party Synthesis Tools and Version Support

The HDL Workflow Advisor is tested with the following third-party FPGA synthesis tools:

  • Xilinx® Vivado® Design Suite 2023.1

  • Xilinx ISE 14.7

  • Intel® Quartus® Prime Standard 22.1.1

  • Intel Quartus Pro 23.3

  • Microchip Libero® SoC 2023.2

  • Cadence® Genus 21.18

  • Cadence Stratus HLS 23.02

  • AMD® Vitis™ HLS 2023.1

Supported Xilinx Boards

HDL Coder™ supports these Xilinx FPGA and SOC boards out of the box for the IP core generation workflow:

  • Artix-7 35T Arty development board, Kintex-7 KC705 development board, Virtex-7 VC707 development board

  • Versal AI Core Series VCK190 Evaluation Kit

  • ZedBoard™

  • Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit

  • Zynq UltraScale+ RFSoC ZCU111, ZCU216 Evaluation Kit

  • Zynq ZC702, ZC706 evaluation kit

Supported Intel Boards

HDL Coder supports these Intel FPGA and SoC boards out of the box for the IP core generation workflow:

  • Intel Arria® 10 SoC, Arria 10 GX development kit

  • Cyclone® V SoC development kit Rev. C and Rev. D

  • Arrow DECA Max 10, Arrow Soc Kit FPGA development board

Supported Microchip Boards

HDL Coder supports the Microchip Polarfire® SoC Icicle kit out of the box for the IP core generation workflow.

Custom Board Support

HDL Coder generates fully portable, platform-independent , target optimized code. If your board is not supported out of the box, you can extend the support to your board by:

  • Manually integrating the generated HDL code into your tool and FPGA project

  • Generating board-independent IP core and add the IP core repository in your HDL tool.

This support extends to boards and chip families from other vendors such as Lattice Semiconductor Corporation®, NanoXplore, and so on. Additionally, if your board vendor is Xilinx, Intel, Microchip, you can create a custom hardware platform through board definition and custom reference design. To learn how to define a custom board and reference design, see Register a Custom Board and Register a Custom Reference Design. For example, see Define Custom Board and Reference Design for AMD Workflow.

Simulink Real-Time FPGA I/O: Speedgoat Target Computer

To run the Simulink Real-Time FPGA I/O workflow, install the Speedgoat I/O Blockset and the Speedgoat® HDL Coder Integration Packages. For more information, see https://www.speedgoat.com/products-services/i-o-connectivity/simulink-programmable-fpga-i-o.

See Also

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