Set up HDL verifier
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how can i fix this problem?
PS: I work with MATLAB 2019b, Quartus Prime 18.1 & FPGA cyclone IV GX.
![](https://www.mathworks.com/matlabcentral/answers/uploaded_files/490125/image.png)
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YP
2022 年 11 月 21 日
The command line window shows "Expected programming file not generated".
You may need to check the project log see why the bit file gen failed.
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