Choose Between CPU and FPGA for HIL Simulation
Hardware-in-the-loop (HIL) simulation connects real hardware components like controllers to a simulated environment that mimics the physical system. This approach allows you to test and refine control and protection strategies under realistic operating conditions, including steady-state, transient, and faulted scenarios, without the risks or costs of exposing the real equipment to these conditions.
You can deploy Simscape™ models to a central processing unit (CPU) or a field-programmable gate array (FPGA). This choice of hardware has a significant impact on timing, development effort, and cost. The best option depends on the application and on the level of model complexity.
CPUs are suitable for slower, less time-critical simulations, and for controller HIL simulations with time steps larger than 20 - 50 µs. If you can use a CPU, then this is the better option because they have a lower cost and are easier to set up, and the models are easier to modify or debug.
You might need an FPGA if a CPU does not provide sufficient performance. FPGAs are suitable for fast, highly deterministic, and low-latency simulations, especially those involving power electronics with submicrosecond time steps.
This table provides an overview of CPU and FPGA simulation. For application-specific guidance, see Choose Between CPU and FPGA.
| Aspect | CPU | FPGA |
|---|---|---|
| Use case |
|
|
| Model complexity | Averaged, linear, or piecewise-linear models with slow dynamics | Fast switching devices |
| Development effort | Easier to implement, modify, and debug | Requires specialized HDL toolchains and knowledge |
| Cost and setup |
|
|
| Switching frequency | ≤1 kHz | Suitable for > 20 kHz |
| Time step capability without I/O | ≥ 20 – 50 μs | < 20 μs Down to nanoseconds |
| Parallelism | Single or multi-core | Massive parallelism |
| Real-time challenge | If the model is too complex, CPU overrun occurs at runtime. | If the model is too complex, FPGA resource overutilization or timing failure occur at synthesis time. |
Choose the Right Blocks
When choosing between CPU or FPGA, start by assessing the complexity of your model. The Simscape Electrical™ libraries include many blocks that model the same device at different levels of fidelity. Low-fidelity models focus on the essential dynamics of your system, enabling simpler parameterization and larger time steps for HIL simulation, while high-fidelity models provide more detailed results. To simplify the design process, choose a block with only as much detail as you need to answer your engineering design questions.
HIL simulations must run in sync with the real controller. If the model is too complex for the hardware to compute within the time step, then the simulation can lag, invalidating the test results. Low-fidelity models sacrifice detail but help maintain deterministic timing. High-fidelity models require more computational resources, which can lead to missed real-time deadlines on a CPU. An FPGA can handle higher fidelity better due to parallelism, but with substantial increases in development complexity and cost. If a simpler model can still provide the level of detail you need, simplifying the model so that you can run it on a CPU is easier and more cost effective than moving to an FPGA. Models that are too complex might be too challenging to run in real time, even on an FPGA.
For more information about choosing blocks with the level of fidelity you need to meet your simulation goals, see these library-specific guides:
Choose Blocks to Model Power Electronic Converters — Select a prebuilt converter block or discrete components to model your converter topology.
Choose Blocks to Model Semiconductor Devices — Select a block to model your semiconductor device and parameterize the block.
Use ideal, switched linear models of transistors for HIL simulation. Current HIL technology can not emulate turn-on and turn-off dynamics of transistors in real time.
Choose Blocks to Model Motors or Actuators — Select a block to model your type of motor or actuator.
Choose Blocks to Model Transformers — Select a block for your application with the correct component behavior as a function of frequency.
Choose Blocks to Model Cables or Lines — Select a block that models your conductor arrangement.
You can move to a lower fidelity level by using reduced-order modeling (ROM) functions
that parameterize simple blocks from high-fidelity Simscape subsystems that model motor drives, semiconductors, and DC-DC converters.
For more information, see generateMotorDriveROM, generateSemiconductorSwitchROM, and generateDCDCConverterROM, respectively.
Choose Between CPU and FPGA
This table shows which models you can test on a CPU and when you need an FPGA for common electrical applications. A CPU is sufficient for many applications. You might need an FPGA in limited circumstances, such as for switching models in high-frequency (>1 kHz) applications. With averaged switching, you can average the pulse-width modulation (PWM) signal over a specified period. Using subcycle averaging, you might be able to use a CPU or FPGA at switching frequencies higher than the limits in this table.
| Application Area | Model | CPU | FPGA |
|---|---|---|---|
| Power electronics | Average-value converter models | Yes — Works well for converters without switching details | Only necessary for extremely high-speed control |
| DC-link and filter dynamics | Yes — Suitable for slower electrical dynamics | Only necessary if tightly coupled with switching | |
Semiconductors with low-frequency switching (≤1 kHz) | Yes — Feasible on CPU because time steps can be larger | Only necessary for ultra-fast control or HIL timing | |
| Semiconductors with high-frequency switching (> 1 kHz) | No — Too slow for switching at microsecond level | Yes — FPGA can handle submicrosecond switching accurately | |
| Power systems | EMT simulation | Yes — Possible for linear models with larger time steps | Only necessary for complex EMT with submicrosecond steps |
| Phasor, RMS, and DQ0 simulation | Yes — Ideal for steady state and slow dynamics | Only necessary if there are fast transients | |
| Grid simulation with average-value or behavioral converter models | Yes — Works well for converters without switching details | Only necessary for extremely high-speed control | |
| Grid simulation with switching models | No — Too slow for switching at microsecond level | Yes — FPGA can handle submicrosecond switching accurately | |
| Mechatronics | Mechanical dynamics (position, velocity) | Yes — CPU easily handles mechanical parts | Only necessary if coupled with fast electrical switching |
Electrical drives with average-value or behavioral converter models | Yes — Suitable for speed and torque studies | Only necessary for ultra-fast control or HIL timing | |
| Electrical drives with switching converter models and low-frequency switching (≤1 kHz) | Yes — Feasible on CPU because time steps can be larger | Only necessary for ultra-fast control or HIL timing | |
| Electrical drives with switching converter models and high-frequency switching (>1 kHz) | No — Too slow for switching at microsecond level | Yes — FPGA can handle submicrosecond switching accurately |
Generate and Deploy Code
Whether you ultimately use a CPU or an FPGA, the best practice is to thoroughly debug and test the model on a desktop before moving to HIL simulation. Then, you prepare your models for code generation. Finally, you generate and deploy the code. These resources help you with these steps.
To learn more about model preparation, see Real-Time Model Preparation.
CPU
To learn more about generating C and C++ code to deploy on CPU, see the documentation for these products:
FPGA
To learn more about generating HDL code from your Simscape models to deploy onto FPGA platforms, see Simscape Hardware-in-the-Loop Workflow (HDL Coder).
