Code Generation from MATLAB Algorithms
R2026bImplement your MATLAB algorithm in hardware by generating HDL code and deploying that code on an Application-Specific Integrated Circuit (ASIC) or Field Programmable Gate Array (FPGA). Write the MATLAB algorithm with syntax and functions that are compatible with HDL code generation. If the algorithm uses floating-point data, HDL Coder™ helps you to convert it to a fixed-point algorithm. Apply optimizations to generate more hardware-efficient HDL code. After you generate HDL code and verify that it matches your original algorithm, deploy the HDL code on your target hardware.
Functions
Objects
coder.HdlConfig | HDL codegen configuration object |
Tools
| Workflow Advisor | Generate synthesizable HDL code and test benches from MATLAB code |
Topics
- Edit Configuration Parameters for HDL Coder
Edit HDL Coder configuration object parameters interactively.
- Programmatically Generate, Verify, and Synthesize HDL Code from MATLAB Code
This example shows how to programmatically perform floating-point to fixed-point conversion, generate HDL code, verify the generated HDL code with an HDL test bench, and synthesize the generated HDL code by using the command-line interface.
- Generate Instantiable Code for Functions
You can use the Generate instantiable code for functions option to generate a VHDL®
entity, or Verilog® or SystemVerilogmodulefor each function. - Generate Modular HDL and HLS Code from an LMS Filter Algorithm
This example shows how to generate modular HDL and HLS code from a MATLAB design that implements an adaptive noise canceler using a Least Mean Square (LMS) filter.
- Generation of Clock Bundle Signals in HDL Coder
How HDL Coder generates clock, reset, and clock enable signals in the HDL code.
Featured Examples
Generate and Synthesize HDL Code for Symmetric FIR Filter Using the HDL Workflow Advisor
Create an HDL Coder™ project and use the MATLAB HDL Workflow Advisor to generate code from a MATLAB® design, verify the MATLAB design with an HDL test bench, and synthesize the generated HDL code. This example uses ModelSim® as the HDL simulation tool and AMD® Vivado® as the third-party synthesis tool. For more information on generating HDL code and performing FPGA synthesis programmatically, see Programmatically Generate, Verify, and Synthesize HDL Code from MATLAB Code.
Generate HDL Code from MATLAB Functions That Use Automated Lookup Table Generation
Generate HDL code from a floating-point MATLAB® design that is not ready for code generation. Use the fixed-point conversion process by using the float2fixed setting with the codegen function to generate a lookup table based MATLAB function replacement. Use the new MATLAB replacement function to generate the HDL code.
Generate SystemVerilog Code for a MATLAB Weighted Blend Algorithm
Generate synthesizable SystemVerilog HDL code from a MATLAB® function that implements a weighted blend of two images. When you generate SystemVerilog instead of Verilog®, the code generator produces array ports and package declarations that improve readability of the generated code.
