Eirik Nordeng

Last seen: 4ヶ月前 | 2022 年からアクティブ

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質問

Implementing logarithmic function via Simulink HDL Coder
I need to implement a logarithmic function in Simulink that can be used for generating HDL code using HDL Coder. The Log block i...

約1年前 | 1 件の回答 | 0

1

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質問

Create fi object from Simulink data type
I am working on documenting a fixed point model and would like to automate as much as possible. I have a script that lists all i...

約1年前 | 1 件の回答 | 0

1

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質問

Documenting ports in a Simulink fixed point model
I am writing documentation for a fixed point model and need to present some text and data about the chosen data types. I would l...

約1年前 | 1 件の回答 | 0

1

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HDL Coder throws error "Minimize algebraic loop occurrences" not supported on atomic subsystem '...' for HDL code generation" when the option is disabled
I found the culprit. A submodule further down in the hierarchy had the option "Minimize algebraic loop occurrences" enabled, but...

約1年前 | 0

質問

Generating math expression LUT using variable from workspace
I am following this guide for creating a LUT for a custom math function: Replace a Custom Function with a Lookup Table - MATLAB ...

1年以上前 | 1 件の回答 | 0

1

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Generic data type configuration based on reference precision.
Thank you, Tom. Your response does not completely match what I was trying to ask, but it turns out that I had made my issue a lo...

1年以上前 | 0

質問

HDL Coder throws error "Minimize algebraic loop occurrences" not supported on atomic subsystem '...' for HDL code generation" when the option is disabled
I get the following error from HDL Coder when trying to generate code for a subsystem in a model: "Minimize algebraic loop occu...

1年以上前 | 2 件の回答 | 0

2

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質問

Generic data type configuration based on reference precision.
I am trying to create a generic model that interfaces a hardware component that has a fixed 44-bit data interface. The input sig...

1年以上前 | 3 件の回答 | 0

3

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質問

Simulink crashes very often during normal work
I am using Simulink to design a digital system for an FPGA. After fixed-point conversion, I intend to use HDL Coder for generati...

1年以上前 | 1 件の回答 | 0

1

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質問

Interfacing hardware components with fixed bit width in Simulink/HDL Coder
I am searching for a generic solution for the following problem: Some FPGA synthesis tools require very specific VHDL code for ...

2年以上前 | 1 件の回答 | 0

1

回答