Avnet RFSoC Explorer Toolbox

Connect to AMD Zynq™ RFSoC evaluation boards using MATLAB. Perform OTA testing with RF add-on cards. Deploy algorithms with HDL Coder

Connect to AMD Zynq™ RFSoC using MATLAB and Simulink

Avnet RFSoC Explorer® is a MATLAB toolbox that enables control of AMD Zynq™ UltraScale+™ RFSoC evaluation boards using MATLAB and Simulink. The toolbox includes a graphical interface and an intuitive API for programmatic control of all RF-ADC and RF-DAC parameters, signal generation and acquisition. System designers and test engineers who want to experiment with OTA signals can use Avnet RFSoC Explorer to control supported RF front-end cards.

Learn more about how Avnet is Extending AMD Zynq™ RFSoC into mmWave

Supported Platforms

Avnet 5G mmWave PAAM Development Platform (feat: Fujikura PAAM add-on card)

Avnet Wideband mmWave Radio Development Kit for RFSoC (feat: Otava DTRX2 add-on card)

Avnet Zynq UltraScale+ RFSoC Development Kit (feat: Qorvo 1800 MHz LTE add-on card)

Xilinx Zynq UltraScale+ RFSoC ZCU208 Evaluation Kit

Xilinx Zynq UltraScale+ RFSoC ZCU111 Evaluation Kit

Convenient RF-DAC Frequency Planning

Documentation and Tutorials

Getting Started Guide for Avnet 5G mmWave PAAM Development Platform

Getting Started Guides for Avnet Wideband mmWave Radio Dev Kit for RFSoC

Getting started with HDL Coder for the Xilinx ZCU208 RFSoC Gen 3 development board

Avnet RFSoC Explorer Application Programming Interface (API)

MathWorks RFSoC products and solutions page

Characterize RFSoC Performance

Development with AMD Zynq UltraScale+ RFSoC starts by characterizing the data converter subsystem using Avnet RFSoC Explorer. Avnet RFSoC Explorer enables you to stream standards-compliant 5G, LTE, and custom waveforms to and from hardware. Several test waveforms are included. Additional custom waveforms may be created with MATLAB, Simulink, 3rd party and MathWorks Toolboxes or other methods. Testing can be performed with either the graphical user interface or programmatic API.

Transmit and Receive Tone Using OTAVA DTRX2 mmWave Radio Card (SoC Blockset™ example)

Wideband Satcom with the Avnet-Otava mmWave Radio Development Kit (IMS2023 event videos)

Perform Over-the-Air Tests with RF Front-end Cards

Avnet RFSoC Explorer enables OTA testing by integrating control of RF front-ends connected to AMD Zynq UltraScale+ RFSoC Evaluation Kits. For example, prototype analog beamforming with the Fujikura FutureAccess™ mmWave phased array antenna module (PAAM).

Model and plot 2-dimensional and 3-dimensional beam patterns of the Fujikura PAAM as you update the number of active antenna array elements, angle, and elevation. (requires Antenna Toolbox from MathWorks)

Validating a CATR benchtop OTA test system for 5G phased array antenna R&D test in cooperation with Rohde & Schwarz and Fujikura (IMS2023 event videos)

Write Test Scripts Easily with API and Auto-complete

Quickly write scripts that programmatically control RFSoC data converter parameters and RF add-on card signal chains. Auto-complete suggests commands and arguments to help you efficiently use the API.

Import Spreadsheet Presets for Automated Testing

Use the spreadsheet import capability (File > Open) to load sequenced presets from Microsoft Excel spreadsheets into Avnet RFSoC Explorer and run comprehensive and repeatable test suites.

Deploy HDL Code for RFSoC

When you move into algorithm development for the stand-alone AMD ZCU208 development kit, Avnet RFSoC Explorer Support for HDL Coder™ FPGA hardware development using Simulink and Hardware Workflow Advisor. This feature requires AMD Vivado® Design Suite 2020.2 for RFSoC Gen 3 devices.

Requirements, tutorials, and examples at Avnet HDL Coder Support Documentation

Supported platforms for HDL code generation:

Xilinx Zynq UltraScale+ RFSoC ZCU208 Evaluation Kit

With this support package you can generate HDL code and port mappings to I/O and AXI registers to build connections to RF tiles and DDR memory, and interactively control the FPGA design from MATLAB.

Other Requirements

Avnet RFSoC Explorer requires one of these free MathWorks support packages:

• Communications Toolbox Support Package for Xilinx Zynq-Based Radio (R2023b and earlier)
• HDL Coder Support Package for Xilinx RFSoC Devices (R2023b and earlier)
• HDL Coder Support Package for Xilinx FPGA and SoC Devices
• SoC Blockset Support Package for Xilinx Devices

Additional support packages may be required for some boards and features.