Avnet RFSoC Explorer

Connect to AMD-Xilinx UltraScale+ RFSoC data converters. Perform analysis in MATLAB and Simulink. Deploy algorithms with HDL Coder.

Connect to AMD-Xilinx RFSoC using MATLAB and Simulink

Avnet RFSoC Explorer® provides a visual interface to AMD-Xilinx Zynq® UltraScale+™ RFSoC using MATLAB and Simulink. An intuitive API enables programmatic control of all RF-ADC and RF-DAC parameters, signal generation, acquisition. System designers who want to test OTA signals can use Avnet RFSoC Explorer to control supported RF front-end cards for popular AMD-Xilinx RFSoC evaluation kits. Algorithm designers can generate IP cores for execution on RFSoC platforms.

Support and Documentation

Getting Started Guides for Avnet Wideband mmWave Radio Dev Kit for RFSoC Gen-3

Getting started with HDL Coder for the Xilinx ZCU208 RFSoC Gen 3 development board

Application Programming Interface (API)

MathWorks RFSoC solutions page

Characterize RFSoC Performance

Development with AMD-Xilinx Zynq UltraScale+ RFSoC starts by characterizing the data converter subsystem using Avnet RFSoC Explorer. Avnet RFSoC Explorer enables you to use MATLAB and Simulink to stream standards-compliant 5G, LTE, and custom waveforms to and from hardware.

Perform Over-the-Air Tests with RF Front-end Cards

Avnet RFSoC Explorer enables OTA testing by integrating control of RF front-ends connected to AMD-Xilinx Zynq UltraScale+ RFSoC Gen1 and Gen3 Evaluation Kits. Explore the entire signal chain in LTE 1800 MHz band-3 and mmWave bands between 19 and 31 GHz.

Supported platforms for RFSoC characterization and OTA test:

• Xilinx Zynq UltraScale+ RFSoC ZCU111 Evaluation Kit (Gen-1)
• Avnet Zynq UltraScale+ RFSoC Development Kit (Gen-1)
• Xilinx Zynq UltraScale+ RFSoC ZCU208 Evaluation Kit (Gen-3)
• Avnet Wideband mmWave Radio Development Kit for RFSoC (Gen-3)

Write Test Scripts Easily with API and Auto-complete

Quickly write scripts that programmatically control of all RFSoC data converter parameters and RF add-on card signal chains. Auto-complete suggests commands and arguments to help you efficiently use the API.

Import Spreadsheet Presets for Automated Testing

Use the spreadsheet import capability (File > Open) to load sequenced presets into Avnet RFSoC Explorer and run comprehensive and repeatable test suites.

Deploy HDL Code for RFSoC

When you move into algorithm development, Avnet RFSoC Explorer Support for HDL Coder™ enables generation of IP cores that can integrate into RFSoC devices using AMD-Xilinx Vivado® Design Suite.

Supported platforms for HDL code generation:

• Xilinx Zynq UltraScale+ RFSoC ZCU208 Evaluation Kit

With this support package you can generate HDL code and port mappings to I/O and AXI registers to build connections to RF tiles and DDR memory, and interactively control the FPGA design from MATLAB.