hdl code generation from simulink model

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Bilal MEJMAA
Bilal MEJMAA 2021 年 6 月 24 日
コメント済み: Bilal MEJMAA 2021 年 6 月 25 日
Hello, I am trying to generate VHDL code for my simulink project. I am using matlab 2020 and my model has two adress entries, which are connected to a FROM File that read adress data from a '.mat' file.
I get this final error as shown in the figure. during the code generation I commented the two input From File, which was demanded by the 'HDL Code Generation Check Report' as error correction.
So the two inputs of the model still with no data, I don't know if this is the cause of the error.
Thank you so much for your help and time.

回答 (1 件)

Kiran Kintali
Kiran Kintali 2021 年 6 月 24 日
All input ports are connected to DUT shold be connected with valid sample times.
Run "hdlsetup" command and make sure all sample times are defined. No pink (inf sample time color) inside the DUT. If there are constants associate sample time or add -1 as sample time to inherit sample times for back propagation.
Run this check to make sure you do not have invalid sample times in the DUT
Check for infinite and continuous sample time sources
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Bilal MEJMAA
Bilal MEJMAA 2021 年 6 月 25 日

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