About hdlsllib/HDL RAMs blocks

hello everyone,

Can you please tell me what is the difference between Port RAM blocks and Port RAM System blocks in the HDL Coder library (For example simple dual port ram and simple dual port ram system)

Thank you very much,

Answer 1

[Kiran Kintali]

hdl.RAM is a system object and all RAM system blocks can be configured within variations of the system object. They have identical behavior w.r.to regular RAM blocks but have additional capabilities apart from being able to use hdl.RAM from MATLAB to HDL workflow.

You can find the details of the block here. Faster simulaiton performance for large RAMs, ability to specify initial values for the RAM contents and RAM bank capability with vector address and data signals.

web(fullfile(docroot, 'simulink/slref/dualportramsystemsimpledualportramsystemsingleportramsystem.html'))

web(fullfile(docroot, 'hdlcoder/ref/hdl.ram-system-object.html'))

[Greeshma Chandran]

Hi,

How could we load data to the RAM or ROM block in simulink using Xilinx block set. I am able to do only using the Simulink blockset

Answer 2

[Kiran Kintali]

>> How can we load data to the RAM or ROM block in simulink?