How to build a model that is efficient for HDL conversion?

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Hossein JavidHosseini
Hossein JavidHosseini 2018 年 8 月 8 日
回答済み: Kiran Kintali 2021 年 12 月 20 日
Hi, I want to build a DVB-S2 modulator model using Simulink and then implement it on an FPGA. What tips should I have in mind before starting model building?

回答 (1 件)

Kiran Kintali
Kiran Kintali 2021 年 12 月 20 日
This example shows how to implement DVB-S2 time, frequency, and phase synchronization and PL header recovery using Simulink® blocks that are optimized for HDL code generation and hardware implementation.


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