How do i resolve this error for converting my Simulink Subsystem into a verilog code?
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Best-precision mode has been specified for the data type parameter 'OutDataTypeStr' in 'Test1/Subsystem/Add2'. In order to calculate the best scaling correctly, at least one of the following block parameters should be specified: 'OutMin, OutMax'
I have tried changing all the output datatypes to fixed-point for all the necessary blocks and also I have kept the integer rounding mode to zero.
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Zack Peters
2016 年 4 月 7 日
Hi Devendra,
I believe that the error message is asking you to specify the 'Output Minimum' and 'Output Maximum' for the 'Test1/Subsystem/Add2' block. To do this, open the block dialog, select the 'Signal Attributes' tab, and specify the minimum and maximum values that the output signal will likely use.
The system is attempting to provide recommended data types based on the range on the signals and will need the specifications above.
~Zack
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Fatema Dalal
2021 年 2 月 16 日
Even I am facing the same issue. What are the minimum and maximum value to be specified?
Ethan Tola
2021 年 3 月 27 日
Hi Devendra!
TL;DR: Try specifying the fractional bits in your fixed point definitions.
I was having this same issue today as well. This was occuring when I was modifying the output parameters for a sum, gain, and subtract block. I had defined the fixed-point output as fixdt(0,10), fixdt(0,13), and fixdt(1, 13) respectively. What fixed it for me was specifying the fractional bits as well. The defined fixed-point output became fixdt(0,10, 0), fixdt(0,13, 0), fixdt(1,13, 0). After that, it compiled without any errors. It seems as Simulink is trying to assume the fractional bits because they were not specified.
Hope that helps!
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