Error when generating test bench
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I am generating a test bench for an AES encrypt/decrypt function that I wrote. It has the prototype of
function EnPlainText = aes_init(cipherPlain,key,mode)
%EnPlainText - Encrypted/Plain Text
%CipherPlain - Cipher/plain text
%key - key
%mode - true for encryption and false for decrypt
I created a testbench by the name 'main.m' with the following contents:
cipherText = aes_init(16:-1:1,1:16,true)
plainText = aes_init(cipherText,1:16,false)
I then converted the code into HDL code using the HDL converter. All the steps until the HDL verification was successful without any warnings or errors. When I try to test the generated code with test bench using Verify with HDL Test Bench option in the HDL coder menu, the following error is shown.
### Begin TestBench generation.
Error using eml_error (line 20)
BIT must be integers between 1 and 4 for embedded.fi.
Error in Float2FixedConverter>runTestBenchToLogDataNew/withScopeProtection/runSimWithTBEvalSimFcn at 567
Error in Float2FixedConverter>runTestBenchToLogDataNew at 495
Error in HDLCoderTB>computeData at 399
Error in HDLCoderTB>generateTB at 460
Error in Manager>wfa_runSimulation at 760
Why is this error being shown. How can I fix this?
Thanks.
1 件のコメント
Sai Sankar
2017 年 5 月 5 日
bro i too get same error, did u figure it out. can u tell me what to do to fix that error
回答 (1 件)
Kiran Kintali
2021 年 4 月 6 日
Need dut.m and testbench.m and a project file (with data type settings, HDL settings) to debug such floating point to fixed poitn conversion or HDL code generation issues.
0 件のコメント
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