In HDL Workflow advisor one could choose between different target workflows such as Generic ASICS/FPGA, FPGA Turnkey, IP Core Generation, FPGA-in-the-loop, Simulink real-time FPGA I/O. I have researched for almost half a day and I couldn't find a clear explanation of differences between these modes. In particular, I would like to know about difference between FPGA Turnkey and IP Core Generation. It is highly appreciated if someone briefly explain this, or cite references where this topic is discussed.
Best regards, Yashar