HDL coder buffer design in Simulink
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sameer al-obaidi
2015 年 6 月 11 日
コメント済み: Bharath Venkataraman
2021 年 3 月 26 日
Hi;
How can I Design Buffer in HDL coder by using simulink.
Regards
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Bharath Venkataraman
2015 年 6 月 11 日
編集済み: Bharath Venkataraman
2015 年 6 月 11 日
You can use the HDL FIFO block. If that does not meet your needs, there are RAM and counter blocks available in Simulink. You can uses these to build a FIFO.
2 件のコメント
Catteau Ophélie
2021 年 3 月 22 日
Can you explain please how to do with RAM and counter block ?
Thank you
Bharath Venkataraman
2021 年 3 月 26 日
I need more info on what exactly you are trying to do.
Depending on what you need to do specifically, a simple approach is to write data into the RAM with incremental write address and read it out with a read address that is configured to read out the data from the RAM in the order you desire.
If what you are hoping is to combine a number of successive values and send them out in one shot, you can simply use enabled registers to store the data and send them out together.
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