Is it possible to generate parametrized HDL for Chart parameters?
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My current understanding is that it is only possible to generate parametrized HDL only if the mask parameters of a subsystem are used in Gain or Constant block. But is it possible to use them in Chart?
I am not talking about the case where mask parameters are used in constant blocks which are fed as inputs to the Chart. I need the generated code to have actual generic ports (in the case of VHDL, or parameters in the case of Verilog).
Is it possible to achieve?
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回答 (1 件)
Kiran Kintali
2023 年 7 月 16 日
Currently type generics are not supported in HDL Coder. Only value generics are possible with certain blocks as discussed in the above thread.
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