HDL work flow advisor for non evaluation board devices
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Hi,
I will pre-pend this with, this is not normally program my Soc device so excuse the dopey questions.
I have been recording the relevant steps for using HDL and Embedded coder to put simulink designs on a SDR.
- It seems that the workflow has "board support" for many evaluation boards, is a "board support" similar to a board support package and if not when does a boards partilcar BSP get involved with HDL workflow advisors process?
- Similar question, if I already have a BSP can I plug this in instead of making my own "board support"?
- When going through the HDL workflow advisors process on https://uk.mathworks.com/help/supportpkg/xilinxzynq7000/ug/guided-sd-card-setup.html it simply states click on a board. Now if I have made my own "board support" will this be an option as it doesnt state in the instructions?
- It is stated that certain Xilinx device families are "supported for the Generic ASIC/FPGA workflow" on https://uk.mathworks.com/help/hdlcoder/gs/language-and-tool-version-support.html , what does this mean, I cannot find reference to this workflow as apposed to the later mentioned "IP Core Generation workflow"?
Any help is much appreciated and feel free to add on anything that would be useful to know.
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Kiran Kintali
2023 年 7 月 16 日
You can create your own custom reference design in MATLAB® and use HDL Coder to integrate the IP core into your reference design. For more details on the workflow, see Targeting FPGA & SoC Hardware Overview.
several examples are available here
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