fatemeh abdi

2017 年からアクティブ

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質問

hi, I simulated TRLS algorithm with leading DCD, but the coefficients didn't converge,would you help me?please
clear all close all clc global N Ts format long % ============================= system model ===========================...

6年以上前 | 0 件の回答 | 0

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質問

i want to simulate this diagram. i don't know what do I simulate loops? please would you help me?
i attached diagram. i want to simulate this figure.

7年弱前 | 0 件の回答 | 0

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質問

I implemented the ERLS algorithm, but it don't identify true. would you help me?
clear all close all clc global N delay Ts format long % ======================== system model ========================== ...

7年弱前 | 0 件の回答 | 0

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質問

is there zero mean block in simulink?
zero mean

約7年前 | 1 件の回答 | 0

1

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質問

i write m file and run correct but don't run in simulink. there is error: Data 'PR1' (#81) is inferred as a variable size matrix, while its specified type is something else.
simulink

約7年前 | 0 件の回答 | 0

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