回答済み
how can i solve the reshape error appearing in my code?
I'm not sure what you are trying to do with HDL Coder here, but there is basically no code in your example that is supported by ...

9年以上前 | 0

| 採用済み

回答済み
Simulink HDL Coder : Invalid Signal Dimension from Dual Port RAM
The Dual Port RAM block should define its output data types explicitly. If it's not, you can try placing a Signal Specification ...

9年以上前 | 1

| 採用済み

回答済み
How to deal with math functions like tan,atan in matlab code while converting them to verilog using hdlcoder?
An alternative approach is to use a lookup-table based function substitution. This works better for sin or cos than it does for ...

9年以上前 | 0

回答済み
makehdl('ImageSharpeningHDLModel/Image Sharpening HDL System') fpga implementation problem
This is all part of the design process. Your model needs to read or drive these signals as appropriate. The Vision HDL Toolbo...

9年以上前 | 0

回答済み
How can I handle variable matrix size error in HDL code generation?
You are using image_wide and image_high to determine your loop limits, which are input variables. You will at least have an issu...

9年以上前 | 0

回答済み
Reference to non-existent field 'inVals'.
Your code contains a lot of code unsuitable for code generation; specifically, all the plot related functions are not supported ...

9年以上前 | 0

回答済み
HDL Workflow Advisor and Xilinx System Generator
This sounds like an issue to take up with customer support.

9年以上前 | 0

回答済み
Error in generate HDL code of simulink block: "Two-Channel Analysis Subband Filter".
"Cannot find the implementation for block" indicates that the specified block is not supported for HDL code generation. (The mes...

9年以上前 | 0

| 採用済み

回答済み
hdl coder dual port ram
This is the current design of the Dual Rate Dual Port RAM. The assertion is in place because the documentation for FPGA target d...

10年弱前 | 1

| 採用済み

回答済み
How to use log functions on HDL Coder?
HDL Coder supports auto-generating function replacement code that uses a lookup table specifically tuned to your use case. There...

10年弱前 | 0

回答済み
I tryed to write an Matlab function and convert it into verilog. I get the following error just like the image below. The error appear wherever their are variables, I don't know way! Please how to overcome this error ?? I appreciate your advice !
HDL Coder requires every variable to be unambiguously typed. Your issues all can be traced back to the function |fcm| being unsu...

10年弱前 | 0

回答済み
Hi sir i am trying to convert matlab to vhdl but during test bench generation i am getting error like "error using divide",please guide to over come this error
Please describe what you are doing when you see this message. Also, please provide as complete of an error log as you can, not j...

10年弱前 | 0

回答済み
hi sir i am working on hdl coder while converting the simulink block to hdl i am getting the error like"type conversion involving struct type is not allowed"how to over come this error
If I had to guess, I'd say you are routing a bus type into a block that is performing a data type conversion. The only similar e...

10年弱前 | 0

回答済み
Getting Started with Hardware-Software Codesign Workflow for Xilinx Zynq Platform - BUG
This error message is coming from Xilinx Vivado, not from MATLAB or HDL Coder. You should be able to load the project file the H...

10年弱前 | 0

回答済み
About HDL Coder in Simulink
I suspect that you have three blocks in your model, the third being a terminator, a scope, or something else that doesn't genera...

10年弱前 | 0

| 採用済み

回答済み
While converting a Feed forward neural simulink model to HDL code its showing "Simulink Blocks and resources Level Description untitled/Feed-Forward Neural Network/Layer 1/tansig/Exp Error Math function exp is not supported." please help
What is your actual question? The 4 error messages you quote are fairly self explanatory.

10年弱前 | 0

回答済み
Regarding stand alone code generation from HDL coder
You didn't attach a log file. Also, please be clear what tool is creating this log file. If it's an Altera log file, this is no...

10年弱前 | 0

| 採用済み

回答済み
found unsupported dynamic matrix type at output port 0
The size of |z| is clearly dependent on the value of an input variable: z=complex(zeros(1,nfft)); Try it with an actual c...

10年弱前 | 0

回答済み
HDL coder stand alone programming with verilog code file
Investigate the use of the Black Box implementation for a Simulink subsystem. This capability is specifically designed to allow ...

10年弱前 | 0

回答済み
regarding problem while generating vhdl code from simulink
You cannot generate code from a Cosimulation block. The purpose of this block is to take existing HDL code and simulate it with ...

10年弱前 | 1

| 採用済み

回答済み
Is there a way to open HDL Workflow Advisor via Command Line?
To open the HDL Workflow Advisor for Simulink, run: >> hdladvisor('modelname/subsystemname') To open the HDL Workflow adv...

10年弱前 | 2

| 採用済み

回答済み
16 bit input output parameter generation using HDLCoder
HDL Coder allows you to choose the default word length to suggest during fixed-point conversion. This is settable on the "Fixed-...

10年弱前 | 1

| 採用済み

回答済み
Simulink Bitslice not working
|bitsliceget| is supported for fixed point types only. What is the type of the data that you are supplying as input to the bit ...

10年弱前 | 1

回答済み
Simulink System Generator Query
System Generator is a Xilinx product, not a MathWorks product. The error message states that you're hitting an internal error in...

10年弱前 | 0

回答済み
About HDL CODER and simulink
HDL Coder does not work with blocks that require continuous time. This makes sense, as the targeted hardware operates in discret...

10年弱前 | 1

回答済み
found unsupported dynamic matrix type at output port 0
HDL Coder does not support dynamic matrices at any point. The matrix in question may not be your final output, but some intermed...

10年弱前 | 0

| 採用済み

回答済み
Can the HDL coder simulate with existing verilog/VHDL codes?
Yes, this is possible and easily implemented. If you want to bring existing HDL code into a HDL Coder subsystem, you can do so b...

10年弱前 | 2

| 採用済み

回答済み
wait statement without UNTIL clause not supported for synthesis Error when using HDL coder
HDL Coder in general does not emit |WAIT| statements in the design code. The only time it does so is upon encountering unclocked...

10年弱前 | 0

回答済み
hdl coder stateflow bit concatenation
To concatenate fixpt variables being used as bit fields, use the MATLAB |bitconcat| function. To extract a range of bits from a ...

10年弱前 | 0

| 採用済み

回答済み
HDL Coder errors don't make sense
I believe your problem is your call to 'find' around like 50 of be_alam.m. 'find' returns a variable size vector as its result. ...

10年弱前 | 0