Is there a block that captures HDL memory read/write operations in Simulink?
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MathWorks Support Team
2009 年 6 月 27 日
編集済み: MathWorks Support Team
2023 年 10 月 16 日
The requirement is to simulate the RAM using blocks that are compatible for HDL code generation.
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MathWorks Support Team
2023 年 10 月 16 日
編集済み: MathWorks Support Team
2023 年 10 月 16 日
Simulink provides several blocks to model RAM read/write behavior for HDL.
The blocks in the HDL Coder/HDL RAMs library in Simulink offer different kinds of RAMs that model the RAM behavior on the target device. Please see the following page for examples on how to use these RAM blocks:
The SoC Blockset offers blocks that simulate the behavior of external memory for SoC applications. Please see the following page for information on how to use these external memory modeling blocks:
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