How to create a FFT ipcore for Zynq using Simulink HDL Coder?

there is an error message "not support for frame based module"? is there any other solution for exporting signal processing blocks to Zynq?

Thank

Owen

Answer 1

[Tim McBrayer]

A frame-based block takes an entire array of data as an input in one time step. This is not very hardware friendly; for hardware, you need to stream your data in one array element at a time. HDL Coder has a "HDL Streaming FFT" block and a "HDL FFT" block designed specifically for hardware implementation. You will need to modify your design to interface with one of these blocks. To access this block in R2013a:

 >> hdllib

This library contains all blocks that support HDL code generation.

1. Double-click on "HDL Demo Library".
2. Choose the "HDL Streaming FFT" or "HDL FFT" block.

A more direct route to the block is to open the HDL Demo Library directly:

 >> hdldemolib

[owen chang]

thank you for sharing.

as shown in the hdlcoder user guide, the din requires a complex signal. but the xilinx logicore axi-stream will only output TDATA[31:0], how could i connect this two blocks? (and is it possible to export Streaming FFT to ipcore with axi-stream interface?)

thanks

Owen

Answer 2

[Kiran Kintali]

Are you using "HDL FFT" or "HDL Streaming FFT" blocks shipping with HDLCoder? These support efficient HDL Code generation and using the HDL Workflow Advisor you can target a model using these blocks to Zynq.

[owen chang]

thank you for sharing.

as shown in the hdlcoder user guide, the din requires a complex signal. but the xilinx logicore axi-stream will only output TDATA[31:0], how could i connect this two blocks? (and is it possible to export Streaming FFT to ipcore with axi-stream interface?)

thanks

Owen