Fpga in the loop with ethernet
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Hi everyone,
I have Atlys Spartan-6 board. I want to do fpga in the loop on simulink. created FIL block perfectly. I double clicked FIL block and load. Fpga plug ethernet and also jtag cable. Program loaded succesfully. When i try to run my simulink model with FIL block. I get an error as “failed to receive a comtrol packet from the FPGA target.” How do i fix it?
Also i am using ubuntu 16.04.
Sorry for my english.
Thanks for help
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ヘルプ センター および File Exchange で HDL Coder についてさらに検索
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