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Is there a way to pipleine HDL reciprocal?

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Armin Azizian
Armin Azizian 2019 年 2 月 13 日
回答済み: Sreejith Menon 2019 年 2 月 20 日
I have a simulink block at runs at 100MHz (10ns sampling rate). I am using an HDL reciprocal block but I don't need it to give me a value every 10ns. I'm wondering if there is a way to pipeline the block internally, or somehow tell HDL coder that this block doesn't need to run at 10ns? I need to be able to insert pipeline registers between iterations of newton raphson operation, or have the tool do something similar for me.
Thanks,

回答 (1 件)

Sreejith Menon
Sreejith Menon 2019 年 2 月 20 日
I am assuming that you are using fixed point operations. Since your requirement is to add pipelines between iterations, let me recommend you to use our Native Floating Pointfeatures. You can read more about Native Floating Point from our document.
Native Floating Point allows you to vary between Zero, Min, Max, and Custom latency for the block. That should help you to achieve your goal.
regards,
Sreejith

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