How do I modify dsp.HDLFFT generated RTL to create smaller FFTs?

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imcuser1
imcuser1 2017 年 9 月 27 日
コメント済み: imcuser1 2017 年 9 月 28 日
I understand the SDF FFT algorithms are cascaded how do I modify the code to realize smaller FFTs? I am running 32K FFT and wish to realize functions below that all the way down to 16.
Have anyone tried before?

回答 (1 件)

Bharath Venkataraman
Bharath Venkataraman 2017 年 9 月 27 日
Are you trying to reuse the code for variable length FFTs? If all you want is FFTs of different sizes, you can configure dsp.HDLIFFT with the appropriate FFT length and generate HDL code.
  1 件のコメント
imcuser1
imcuser1 2017 年 9 月 28 日
I have 32K FFT RTL working on my FPGA and wish to have 16K, 8K, .. etc by modifying the same RTL.

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