How to use design verifier with incompatible simulink models?

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Tushar Agarwal
Tushar Agarwal 2016 年 7 月 10 日
回答済み: Akshat Dalal 2025 年 3 月 2 日
I have a Simulink model with an integrator block that cannot be stubbed while running the design verifier, rendering the model incompatible with the design verifier. Is there a way to increase the coverage of such a model other than manually building test cases?

回答 (1 件)

Akshat Dalal
Akshat Dalal 2025 年 3 月 2 日
Hi Tushar,
You will have to write your own block replacement rules to handle the unsupported blocks for SLDV. Please refer the following documentations for more information:
Thanks

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