Practicality of HDL Coder for complex designs.

Assume I have a linear cmos sensor which continuous scan the space for stars and output a string of pixels every few micro seconds, and my FPGA is expected to take into that pixel values, do accumulation, multi-dimensional transforms as complex as fft, and dump into memory and interface to an LCD display. And it also needs to receive instructions from CPU to set the intervals and transform parameters. The transform part needs rapid prototyping, i.e. between Matlab & HDL. I understand that usually a Matlab algorithm needs a lot of re-writting to make it as close to hardware as possible in order to work with HDL coder.

What is the effort needed between recoding matlab to re-assemblying HDL blocks? (Assume in a classic HDL design, after 1st round of converting a Matlab algorithm to HDL, we have a version of the HDL which have all the basic elements like butterflies and multipliers and future Matlab algorithm change usually involves twicking these basic HDL elements).

So my question is, how much effort can I save in order to bring up a design with some amount of controls? How can I best fit the HDL Coder to my design?

Answer 1

[Bharath Venkataraman]

If you use blocks like the HDL Optimized FFT, the control signals are part of the block and can be used to drive the functionality. This should make the process of building the design easier.