Hi,
I want to access to the DDR4 using jtag 2 axi manager, I have set a jtag 2 axi ip core in my block design:
And if I load the generated bitstream to fpga via vivado, the jtag 2 axi manager is visible.
And the memory can be accessed by tcl commands.
However, when i use matlab command 'h = aximanager('AMD');'
the matlab can not found the jtag 2 axi ipcore.
What's the problem? QAQ
looking forward to your reply!

 採用された回答

KH
KH 2024 年 12 月 10 日

0 投票

明白原因了,必须使用matlab专用的jtag2axi ip核,其路径为:
% C:\Program Files\MATLAB\R2022a\toolbox\hdlverifier\supportpackages ...
% \fpgadebug_xilinx\+hdlverifier\+fpga\+vivado ...
不能使用vivado的jtag2 axi

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KH
2024 年 12 月 8 日

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KH
2024 年 12 月 10 日

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