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Why is the FPGA image for UHD different?

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Jay
Jay 2024 年 6 月 20 日
コメント済み: R 2024 年 6 月 25 日
Hello,
I am using Matlab 2024A - update 4 with Communications Toolbox for UHD (B210 hardware). I noticed that the FPGA image download for the B210-UHD is different. What is the difference between the UHD image from Ettus and the Mathworks FPGA image?
Here is the line from my Matlab session.
linux; GNU C++ version 10.3.0; Boost_107800; UHD_4.2.0.0-vendor
UHD_4.2.0.0-vendor seems unique to Mathworks, is this correct?

回答 (2 件)

R
R 2024 年 6 月 21 日
Hi @Jay,
The MathWorks UHD image (UHD_4.2.0.0-vendor) is customized to integrate seamlessly with MATLAB and Simulink.
This includes additional features, patches, or modifications specific to MathWorks' requirements. For example, it includes specific patches to enhance the performance or functionality of the B210 hardware.
On the other hand, UHD versions from Ettus Research follow their standard versioning scheme and are primarily tested with Ettus Research's software and tools.
  2 件のコメント
Jay
Jay 2024 年 6 月 21 日
Thanks for the reply. Does Mathworks allow the FPGA to be modified using the HDL Coder toolset?
If so, how does one obtain this HDL code for reuse?
R
R 2024 年 6 月 25 日
Yes, you can program both the processing system and programmable logic. By default, HDL Coder places the generated HDL files in the subfolders hdlsrc or hdl_prj within your current working directory. You can explore these folders to reuse the HDL code as needed.

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Kiran Kintali
Kiran Kintali 2024 年 6 月 21 日
編集済み: Kiran Kintali 2024 年 6 月 21 日
>> Does Mathworks allow the FPGA to be modified using the HDL Coder toolset?
Yes, if you have an FPGA/SoC on the board you can use HDL Coder to customize the hardware description and program the board.
You can also review this HDL Coder support package for NI hardware that may be related.
  1 件のコメント
Jay
Jay 2024 年 6 月 24 日
Thank you for your answer; your comments discuss the tools available for HDL development. I would like to state my question more clearly.
Does Mathworks make the Ettus B210 FPGA VHDL code available to users?
If so, where does one obtain the VHDL code from?

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