Attempts to Stream from PS to PL, then PL to PS using SoC Blockset

Hi All,

I just want to know if there is anyone successfully implement and deploy a design where you stream from PS to PL and read back the data from PL to PS with the two blocks Software to AXI4-Stream and AXI4-Stream to Software or not?

I have a design where I generated a counter in PS and stream to PL and do a loop back read to stream the data from PL to PS. The data reading at the end is probed at PS. My simulation is working as I could read data at the end output (which is the counter itself). However, for deployment, SoC Builder gave me an error when generating the IP Core. I kinda know the idea what it was indicating, but am clueless of how to fix in Simulink environment. To me, it looks like using two blocks of AXI4-Stream (yellow in block diagram) is prohibited/unsupported in my version of Matlab.

What's your thought on it? Is there a way to work around?

Cheers,

Vu.

[Sai Kiran]

Hi,

Can you attach the model such that I can reproduce it at my end?

Thanks!