Deep Learning HDL Toolbox - HDL generation

14 ビュー (過去 30 日間)
sdsd sdsd
sdsd sdsd 2023 年 3 月 4 日
回答済み: Rubén 2025 年 5 月 7 日
Can I use Deep Learning HDL Toolbox to generate HDL code for a neural network, and then create a bitstream from this code myself using Quartus software? I do not have a board supported by this Toolbox, I have only a Cyclone V FPGA.

採用された回答

Kiran Kintali
Kiran Kintali 2023 年 3 月 5 日
Deep Learning Processor IP Core Generation for Custom Board
This example shows how to create custom board and generate a deep learning processor IP core for the custom board. In this example you:
  • Create a custom board and reference design
  • Estimate the network performance and board resource utilization
  • Generate a custom processor and bitstream
  • Deploy the network by using the custom bitstream

その他の回答 (1 件)

Rubén
Rubén 2025 年 5 月 7 日
Hello,
I previously used the Deep Learning HDL Toolbox on an Intel Arria 10 SoC board, and now I would like to use it with a DE10-Nano SoC board. I noticed that the credentials for the provided prebuilt Linux system for the Arria 10 were user "root" and password "cyclonevsoc". Is there a prebuilt image available — even an older version — for the Cyclone V SoC?

カテゴリ

Help Center および File ExchangeFPGA, ASIC, and SoC Development についてさらに検索

製品


リリース

R2022a

Community Treasure Hunt

Find the treasures in MATLAB Central and discover how the community can help you!

Start Hunting!

Translated by