pulse gate in thyristor

in fullwave fully controlled r load rectifier i cant balance the 2 pulse gate that cause wrong waveform for the thyristors

回答 (1 件)

Joel Van Sickel
Joel Van Sickel 2022 年 6 月 13 日

0 投票

If you post a screenshot of your simulink model (or share the model) it might be easier to point out what the specific issue is. Here are some examples of thyrsitor based recitifiers that you can start with:
Regards,
Joel

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質問済み:

2022 年 5 月 22 日

回答済み:

2022 年 6 月 13 日

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