Soc Builder Support for Xilinx and DDR4 external memory

Hello,

I am using Soc Builder Support for Xilinx to develop some projects on the ZCU 111 board with RFSOC.

There are some aspects that I did not understand from the documentation

1) Can I use directly in Simulink the external DDR4 memory for custom purposes

2) Is it possible to modify the VHDL of the datapath directly in VIVADO and generate the upgraded bitstream from Vivado?

Thank you very much for your answers

Answer 1

[Vivek Singh]

1) Yes, it possible to use simulink in external memory. For an example on modeling a design in Simulink to access external DDR on board, please refer the below example page.

- https://www.mathworks.com/help/soc/ug/image-rotation.html

2) Modifying a Vivado project is not part of SoC Blockset workflow. But still, you should be able to open the created Vivado project and modify it.