Why cant I get the same results IFFT block and HDL Optimized IFFT block.

I'd like to perform OFDM on FPGA's and for that I had to use IFFT block. To perform the IFFT I used the example "OFDM Receiver with 512-Point Streaming I/O FFT". In the example OFDM transmitter part there is an IFFT block and I insert HDL optimized IFFT block and compare them with the spectrum analyzer. However the resultts are different. How can I öconstruct the OFDM transmitter? I put the screen shots of spectrum analyzers and the model.

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Answer 1

[Bharath Venkataraman]

The HDL Optimized FFT and IFFT don’t support natural order output in R2014a. The output of the HDL Optimized IFFT in your model is in Bit Reversed order. To be able to compare the output of the HDL Optimized IFFT with IFFT, you need to put the output in natural order. Connect a deserializer and Bit Reverse Order block after your HDL Optimized IFFT and then connect it to spectrum analyzer. You can find these two blocks at the top level of the same example (OFDM Receiver with 512-Point Streaming I/O FFT).

[Erdem Özyurt]

Thank you for your answer. I'd like to construct an OFDM transmitter and then by using the hdl coder I want to download the model to the FPGA. However I couldnt find hdl supported bit reverse order block for 512 point. Is there any?

[DN]

This example from Mathworks is not very useful in the sense that half of the HDL part uses blocks that is not HDL compatible. For example in the "serializer" and "deserializer" blocks there are the standard buffer and un buffer blocks. These blocks cannot be converted to HDL code, so even if you do use the optimized HDL FFT technique you are still stuck with useless blocks without using FIFO's and doesn't demonstrate a good comparison with the FFT that is non-HDL.

[DN]

Actually forget my comment, I think this example was demo'ed before 2014b release which seems to have brought out "Serializer" and "Deserializer" HD blocks, which will allow you to ditch the standard buffer and unbuffer Simulink blocks that was used in this example on the HDL side yet not HDL ready. Thanks.