Is JK FF in MATLAB (Simulink extras) can be converted to HDL code?

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Roy Francis
Roy Francis 2014 年 6 月 8 日
回答済み: Tim McBrayer 2014 年 6 月 9 日
Hello Sir,
I have used JK FF to implement frequency division in my model. The model successfully simulated. When tried to convert it HDL code using HDL Coder (ver. 3.0), the following error reported:
"Warnings/Errors: Cannot find the implementation for block 'StaticRC_V_Hz_HDL1/Static RC_V_Hz/V_Hz Modulation Sub-system/Clk_Div1/J-K Flip-Flop/J-K Flip-Flop/Logic"
"Error: 'Output port 'Q' must have an initial value of 0 for HDL code generation.'"
Is there any other solutions possible?
Any other versions of HDL Coder supports JK FF conversion to HDL code?
Thanking you in advance..
Roy

採用された回答

Tim McBrayer
Tim McBrayer 2014 年 6 月 9 日
The J-K Flip Flop is not supported by HDL Coder for HDL code generation. HDL Coder does not support any blocks (such as the J-K Flip Flop) that explicitly model the clock in a digital system. It is not intended to act as a schematic entry tool. As such, HDL Coder synthesizes an implicit clock based off the Simulink behavior of the supported state elements in the model.
The basic state element for HDL Coder is the Delay block, which is equivalent to a D flip flop. To remodel your design to not require a J-K flop will be your best bet. You have several options to you if you require the specific behavior of a J-K flop. Off the top of my head:
  1. Build a J-K flop with a D-flop and additional logic built from basic Simulink blocks
  2. Create a MATLAB Function block with the desired behavior
  3. Create a Stateflow chart modeling the desired behavior

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