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Resetting FFT (HDL Optimized) in Simulink
You probably reset the core too early before the whole frame is out. Use the ENDOUT output signal of the FFT to time the reset. ...
Resetting FFT (HDL Optimized) in Simulink
You probably reset the core too early before the whole frame is out. Use the ENDOUT output signal of the FFT to time the reset. ...
約7年 前 | 0
回答済み
how to simulate FFT HDL optimized?
Hi, I could reproduce the failure in R2015a. But it is not reproducible is R2016a. It seems that the bug is fixed in R2016a rel...
how to simulate FFT HDL optimized?
Hi, I could reproduce the failure in R2015a. But it is not reproducible is R2016a. It seems that the bug is fixed in R2016a rel...
7年以上 前 | 0
| 採用済み
回答済み
how to simulate FFT HDL optimized?
Hi, I believe you are using R2014a. If you provide the input data type, I can check if it is fixed in later versions. I recomme...
how to simulate FFT HDL optimized?
Hi, I believe you are using R2014a. If you provide the input data type, I can check if it is fixed in later versions. I recomme...
7年以上 前 | 0
回答済み
how to simulate FFT HDL optimized?
Hi, Would you please attach your model? Thanks Ali
how to simulate FFT HDL optimized?
Hi, Would you please attach your model? Thanks Ali
7年以上 前 | 0
回答済み
Large dsp.HDLFFT result discrepancy with floating point simulation.
Currently there is no way to select twiddle factors wordlength. We should note that the optimal twiddle factor wordlength in F...
Large dsp.HDLFFT result discrepancy with floating point simulation.
Currently there is no way to select twiddle factors wordlength. We should note that the optimal twiddle factor wordlength in F...
約8年 前 | 0
回答済み
Large dsp.HDLFFT result discrepancy with floating point simulation.
You need to have more bits, specially fractional bits to get better result. Your fixed point is 4 bits with 0 fractional bits an...
Large dsp.HDLFFT result discrepancy with floating point simulation.
You need to have more bits, specially fractional bits to get better result. Your fixed point is 4 bits with 0 fractional bits an...
約8年 前 | 0
回答済み
FFT HDL Optimized input vector size of only 64
It is possible to build N-point FFT using two N/2 point FFT. But it requires extra steps and it is not straight forward. For exa...
FFT HDL Optimized input vector size of only 64
It is possible to build N-point FFT using two N/2 point FFT. But it requires extra steps and it is not straight forward. For exa...
約9年 前 | 0
回答済み
FFT HDL Optimized block output is different from FFT block output
Hi Milruwan, The spectrum analyzer takes the FFT of the input signal, which means that what you are looking at is the FFT of a...
FFT HDL Optimized block output is different from FFT block output
Hi Milruwan, The spectrum analyzer takes the FFT of the input signal, which means that what you are looking at is the FFT of a...
9年以上 前 | 2
回答済み
FFT HDL Optimized block output is different from FFT block output
In your model, you send one sample at a time to FFT and FFT HDL optimized. FFT zero pads the input data to create a frame the sa...
FFT HDL Optimized block output is different from FFT block output
In your model, you send one sample at a time to FFT and FFT HDL optimized. FFT zero pads the input data to create a frame the sa...
9年以上 前 | 1
回答済み
How to use fft in matlab hdl code to generate hdl code
From R2014b and later versions, 'FFT HDL Optimized' System Object is supported that you can generate HDL code from it.
How to use fft in matlab hdl code to generate hdl code
From R2014b and later versions, 'FFT HDL Optimized' System Object is supported that you can generate HDL code from it.
11年弱 前 | 0
回答済み
HDL FFT Optimized. Valid Out always high
Hi Lennart, Here is the website that you can download the patch for 14a and 14b. Please read the release notes because the pa...
HDL FFT Optimized. Valid Out always high
Hi Lennart, Here is the website that you can download the patch for 14a and 14b. Please read the release notes because the pa...
11年弱 前 | 0
回答済み
HDL FFT Optimized. Valid Out always high
Hi Lennart, The HDL is verified and matches Simulink behavior. One thing that you can do to verify the result is to generate ...
HDL FFT Optimized. Valid Out always high
Hi Lennart, The HDL is verified and matches Simulink behavior. One thing that you can do to verify the result is to generate ...
11年弱 前 | 1
| 採用済み
回答済み
HDL FFT Optimized. Valid Out always high
If you keep validIn high, the result is correct. Even in case the valid in is toggling, the HDL sends out the FFT of the input, ...
HDL FFT Optimized. Valid Out always high
If you keep validIn high, the result is correct. Even in case the valid in is toggling, the HDL sends out the FFT of the input, ...
約11年 前 | 0
回答済み
HDL FFT Optimized. Valid Out always high
This is a bug in our implementation - we are looking into a patch for the issue.
HDL FFT Optimized. Valid Out always high
This is a bug in our implementation - we are looking into a patch for the issue.
約11年 前 | 0
