Disabling SMIs on Intel(R) ICH5 chipsets

Avoid CPU overloads with xPC Target(TM) on Intel(R) chipsets by disabling SMIs
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更新 2016/10/14

ライセンスの表示

To successfully operate real-time software on any microprocessor system, control and management of all interrupt services is required. Unfortunately, depending on your BIOS, it may not be possible to turn off certain interrupts known as System Management Interrupts (SMIs). These interrupts are not accessible from operating system, kernel, or application software and the CPU cannot be instructed to ignore them. However, for some chipsets, such as the Intel ICH5 family, it is possible to programmatically prevent or disable the generation of SMIs.
Unexpected SMIs will cause random and spurious CPU overloads. The enclosed S-function and Simulink block will disable SMIs on the Intel ICH5 chipset family and help avoid these overloads.

引用

Rajiv Ghosh-Roy (2025). Disabling SMIs on Intel(R) ICH5 chipsets (https://www.mathworks.com/matlabcentral/fileexchange/18832-disabling-smis-on-intel-r-ich5-chipsets), MATLAB Central File Exchange. に取得済み.

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作成: R2014a
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バージョン 公開済み リリース ノート
1.3.1.0

Updated with more chipset ids.
You will need to mex the file ich5.c before using the block.

1.3.0.1

Updated license

1.3.0.0

Added PCI ID 0x2917.

1.1.0.0

Added chipsets for ICH9 based on user contributions, PCI IDs 0x2916 and 0x2918.

1.0.0.0

Added more chipsets from the ICH7 family; updated to test the GBL_SMI_EN
bit if it got set. Please see the Readme_SMI.txt file for more details.