HDL Coder Dual Port RAM multiple clock?

Hi, just wondering if it is possible to have HDL Block "Dual Port RAM" generate HDL code for multiple clk dual port ram.

I have already attempted trying: >> make hdl('dut','ClockInputs','multiple');

If I have to use multiple clock on dual port ram, do I have to go for SysGen?

Answer 1

[Tim McBrayer]

The current implementation of the HDL Dual Port RAM only supports a single clock.

[vein]

Any plan to support dual clock in the future?

[Tim McBrayer]

Yes. Support for a dual clock dual port RAM is planned to be added in R2014a.

[Stefanie Schwarz]

Here is the new block that supports using two different clock domains: Dual Rate Dual Port RAM