MATLAB Release | Supported Vivado release |
R2024b | Vivado 2023.1 |
R2024a | Vivado 2023.1 |
R2023b | Vivado 2022.1 |
R2023a | Vivado 2022.1 |
R2022b | Vivado 2020.2 |
R2022a | Vivado 2020.2 |
R2021b | Vivado 2020.1 |
R2021a | Vivado 2019.2 |
R2020b | Vivado 2019.2 |
R2020a | Vivado 2019.1 |
R2019b | Vivado 2018.3 |
R2019a | Vivado 2018.2 |
R2018b | Vivado 2017.4 |
R2018a | Vivado 2017.2 |
R2017b | Vivado 2016.4 |
R2017a | Vivado 2016.2 |
R2016b | Vivado 2015.4 |
R2016a | Vivado 2015.2 |
R2015b | Vivado 2014.4 |
R2015a | Vivado 2014.2 |
R2014b | Vivado 2013.4 |
Which versions of Vivado are supported with which release of HDL Coder?
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MathWorks Support Team
2020 年 4 月 16 日
編集済み: MathWorks Support Team
2025 年 1 月 9 日 10:34
I would like to use HDL Coder and its HDL Workflow Advisor to automate the programming of my Xilinx (now AMD) FPGA. For this, I need to install Vivado Design Suite as synthesis tool. Could you tell me which versions of Vivado are compatible with which releases of MATLAB/HDL Coder?
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MathWorks Support Team
2025 年 1 月 9 日 0:00
編集済み: MathWorks Support Team
2025 年 1 月 9 日 10:34
Here is a list of MATLAB releases and the AMD Vivado (formerly Xilinx Vivado) versions that HDL Workflow Advisor has been tested against:
.Important Notes:
(1) HDL Coder generated VHDL/Verilog code is Vivado version independent and works with any version of the Vivado software. The above list refers to using HDL Workflow Advisor for integrated workflows such as IP core and bitstream generation. If you are interested in generating VHDL/Verilog code only, without invoking a synthesis tool, see the following post:https://www.mathworks.com/matlabcentral/answers/1643865-how-do-i-generate-code-only-with-hdl-coder
(2) For the Generic ASIC/FPGA workflow in HDL Workflow Advisor, note that the above list states the last supported Vivado version for each release. For example, if you work with HDL Coder R2020a, you should be able to use HDL Workflow Advisor with Vivado 2019.1 and all previously tested Vivado versions, all the way back to 2013.4.
(3) For the IP Core Generation and Simulink Real-Time FPGA I/O workflow in HDL Workflow Advisor, it is recommended to use the exact Vivado version that is stated in the list above for your release, or one of the exact version(s) that is supported by the reference design that you are using. You can see this information in HDL Workflow Advisor step 1.2. after selecting your desired reference design:
Learn More:
For more information regarding synthesis tool and device support by HDL Coder, see the "Supported Third-Party Tools and Hardware" documentation page:
https://www.mathworks.com/help/releases/R2023a/hdlcoder/gs/language-and-tool-version-support.htm (adjust the URL to match your used MATLAB release)
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