Simulink simulation of multiple clock domains

I am trying to simulate devices with different clock domains over a relatively long period, but attempting to minimise the amount of data generated. My initial naive approach was to simulate at the lowest common multiple (LCM) frequency of the two clock domains. However, if the frequencies are close together (as I want them to be), the LCM frequency is very large. Hence, the fixed-step simulation creates a lot of data (1e9 data points), which causes issues with memory on my machine. The more advanced approach is to use a variable step solver. I am attempting to use remainder operations with the clock to provide a trigger signal to each clock domain to model these two systems. I use the simulation clock as a counter, and take the remainder of this to give me each clock domain period. The remainder wrap is the trigger/enable signal for each of the systems. The solver does not hit all of the points that it should. I have been playing around with the settings for the solver, such as the maximum and minimum step size etc.

Is there a particular solver algorithm that can perform large steps and then go back to find where the transition occurs? Alternatively, the less attractive option would be to run a fixed step solver at a high rate, but only save on the trigger signals. I have implemented this latter option, but would be very interested in advice on the choice of solver, or anyway to force this required behaviour.

Regards,

David