VHDL code as a Black Box subsystem
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Is any documents to show integrating hand-written HDL code with "Black Box"? I cannot find any tutorials or examples.
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Walter Roberson
2012 年 1 月 19 日
Context: http://www.mathworks.com/matlabcentral/answers/12650-vhdl-verilog-simulink
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Tim McBrayer
2012 年 1 月 20 日
Simulink® HDL Coder™ does not have a published demo directly addressing the use of hand-written code with a Subsystem Black Box implementation. However, the tool's User's Guide documentation does contain a fairly comprehensive example performing exactly the task you are asking about. See the section entitled (in the R2011b documentation) "Black Box Implementation for Subsystem Blocks", which resides in the "Interfacing Subsystems and Models to HDL Code" chapter.
1 件のコメント
Kaustubha Govind
2012 年 1 月 20 日
Here is the link: http://www.mathworks.com/help/toolbox/slhdlcoder/bso3rab-1.html
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