generate simulink model from VHDL code?

1 回表示 (過去 30 日間)
Roger
Roger 2014 年 3 月 5 日
コメント済み: Roger 2014 年 3 月 6 日
Hi,
I want to know if HDL coder is capable of generating simulink model from a given VHDL code? in order to intergret exist small part of design to a larger project. That will save large amount of time for development. Thanks!

採用された回答

Tim McBrayer
Tim McBrayer 2014 年 3 月 5 日
No, there is no capability within HDL Coder to generate Simulink from HDL; the tool works exclusively in the other direction.
If you need to import VHDL into a larger design, you can use HDL Coder's Black Box feature to include handwritten HDL code into a larger set of generated HDL code. You could also use HDL Verifier to cosimulate hand-written HDL code in a Simulink design.
  1 件のコメント
Roger
Roger 2014 年 3 月 6 日
Thank you Tim, now it's more clear to me.

サインインしてコメントする。

その他の回答 (0 件)

カテゴリ

Help Center および File ExchangeHDL Coder についてさらに検索

Community Treasure Hunt

Find the treasures in MATLAB Central and discover how the community can help you!

Start Hunting!

Translated by