Can I export Simulink block parameters to the VHDL entity port list?

Using Simulink 2013 and the HDL coder, I'd like to expose Simulink parameters in the entity's port list. Model parameters show up as signals in the architecture, but not in the entity. I tried the option to "Generate parameterized HDL code" but that did not put the parameter in the entity's ports list.

Thank you for any ideas,

Steve K

Answer 1

[Tim McBrayer]

This capability is not currently available in HDL Coder. It is a requested feature, though, and may end up in the product in the near future.