How to set the user defined function in MATLAB to have 8-bit integer datatype

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Roy Francis
Roy Francis 2013 年 11 月 4 日
編集済み: Walter Roberson 2013 年 11 月 4 日
I have simulated a sine pwm in simulink which works well in the model. This model converted to HDL code (verilog code) using HDL Coder tool in the simulink. I have used quartus synthesis tool from Altera (ver 9.1). While simulating the quartus project the following error reported:
Error (10172): Verilog HDL unsupported feature error at Modulation_Subsystem.v(42): real variable data type values are not supported.
The "Modulation_Subsystem.v" is a user defined function. That accepts three switch inputs and based on this boolean input output is defined.
The code for the user defined function is attached:
function [y,z] = fcn(u,x1,x2,x3)
%#codegen
uint8 z;
%c=12*u
if x1==0 && x2==0 && x3==0
y = u/1.4;
z = 0;
elseif x1==1 && x2==0 && x3==0
y = u/2;
z = 1;
elseif x1==0 && x2==1 && x3==0
y = u/2.8;
z = 2;
elseif x1==1 && x2==1 && x3==0
y = u/3.6;
z = 3;
elseif x1==0 && x2==0 && x3==1
y = u/4.2;
z = 4;
elseif x1==1 && x2==0 && x3==1
y = u/5;
z = 5;
elseif x1==0 && x2==1 && x3==1
y = u/5.6;
z = 6;
else
y = u/6.4;
z = 7;
end
Hoping to get reply..
Thanks and Regards,
Roy

回答 (1 件)

Tim McBrayer
Tim McBrayer 2013 年 11 月 4 日
Ultimately, you need to figure out where the doubles are creeping in; what is the first signal or value in your dataflow that is a double in Simulink? This will get emitted as a real. Looking at your code, you have a lot of constants embedded in it; recall that in MATLAB code all data is by default a double. So, you need to type your constants, which will entail learning about fixed point typing, since you are trying to divide by decimal values. Type "web(fullfile(docroot, 'fixedpoint/index.html'))" to access the fixed point help.
Typed constants may look something like:
fi(1.4, 0, 8, -5)
uint8(0)
The input and output data types to your function can be set via the Model Explorer (Tools->Model Explorer via menu, or ^H in the model diagram).
The final problem you will run into is your use of the division "/" operator. In general this is not synthesizable. If you intend to synthesize your design you will need to replace this with some other numeric operation. Since you are dividing by a constant you can change the divisions into multiplies by the reciprocal values.

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