Main Content

Supported Texas Instruments C2000 Processors

The following table shows the list of C2000™ Microcontroller Blockset processors that are supported for each processor family. In this topic, you will also understand the differences between generic and LaunchPad entries for C2000 processors.

Processor Family

Processors

TI Delfino F28377S LaunchPad

F28377S

TI Delfino F2837xS

F28379S, F28377S, F28376S, F28375S, and F28374S

TI Delfino F28379D LaunchPad

F28379D

TI Delfino F2837xD

F28379D, F28377D, F28376D, F28375D, and F28374D

TI Delfino F2833x

F28335, F28334, and F28332

TI Delfino C2834x

C28346, C28345, C28344, C28343, C28342, and C28341

TI Piccolo F280049C LaunchPadF280049C
TI Piccolo F28004x

F280049M, F280049C, F280049, F280048C, F280048, F280045, F280041C, F280041, F280040C, and F280040

TI Piccolo F2807x

F28075 and F28074

TI Piccolo F2806x

F28069M, F28069, F28068, F28067, F28066, F28065, F28064, F28063, and F28062

TI Piccolo F28069M LaunchPad

F28069M

TI Piccolo F2805x

F28055, F28054, F28053, F28052, F28051, and F28050

TI Piccolo F2803x

F28035, F28034, F28033, F28032, F28031, and F28030

TI Piccolo F2802x

F28027, F28026, F28023, F28022, F28021, F28020, and F280200

TI Piccolo F28027/F28027F LaunchPad

F28027

TI F280x

F2809, F2808, F2806, F2802, F2801, F28016, and F28015

TI F28044

F28044

TI F281x

F2812, F2811, and F2810

TI F2838xF28388D, F28388S, F28386D, F28386S, F28384D, and F28384S
TI F28002xF280025, F280025C, F280024, F280024C, F280023, F280023C, F280022 and F280021
TI F280025C LaunchPadF280025C
TI F28003xF280033, F280034, F280036, F280036C, F280037, F280037C, F280038, F280038C, F280039, and F280039C
TI F280039C LaunchPadF280039C
TI F280013xF2800132, F2800133, F2800135, and F2800137
TI F2800137 LaunchPadF2800137
TI F280015xF2800152, F2800153, F2800154, F2800155, F2800156, and F2800157
TI F28P65xF28P650D, F28P650S, F28P659D, and F28P659S
TI F28P650D LaunchPadF28P650D
TI F28P55xF28P550SJ9, F28P550SG9, F28P550SD7, F28P550SD4,F28P559SJ9, F28P559SJ2, F28P559SG8, F28P559SG2, and F28P559SD7
TI F28P550S LaunchPadF28P550S
TI Concerto F28M35xF28M35H52C, F28M35H22C, F28M35M52C, F28M35M22C, F28M35M20B, and F28M35E20B
TI Concerto F28M36xF28M36P63C, F28M36P53C, F28M36H53C, F28M36H53B, F28M36H33C, and F28M36H33B

Understanding Differences Between Generic and LaunchPad Entries for C2000 MCUs

In C2000 Microcontroller Blockset, certain microcontrollers have multiple entries in Configuration Parameters (Configuration Parameters > Hardware Implementation > Hardware board). One entry is a generic entry for the given processor, such as TI Delfino F2837xD, and the other entry is for the LaunchPad development kit for the processor, such as TI Delfino F28379D LaunchPad. The defaults for the generic entry of a processor usually match with the control card defaults. Understanding the differences between these entries is crucial for hardware configuration and functionality.

Key Differences

The main differences between the generic and LaunchPad entries are:

  1. CCXML File - Different CCXML files are provided for the generic and LaunchPad boards. Navigate to Configuration Parameters > Hardware Implementation > Target hardware resources > Build options and select the appropriate CCXML file. You can find these files in:

    <C2000WareInstallLocation>\device_support\<device>\common\targetConfigs

  2. Default GPIO Pin Selection - Ensure the default GPIO pins match the hardware requirements. The default GPIO pins for peripherals are selected based on availability on the board.

  3. External Clock Differences - If necessary, update the external clock settings under Configuration Parameters > Hardware Implementation > Target hardware resources > Clocking. The external clock provided in the boards differs and must be updated accordingly.

Using Generic Entries on LaunchPad Boards

You can select any generic entry (ControlCards or custom boards) of a processor as the hardware board and configure it as the LaunchPad by updating the CCXML file and verifying the GPIO pins. For example, you can use the hardware TI F28P55x to run a model on the LAUNCHXL-F28P55X board if you update the CCXML file correctly.

Below are the differences for various processors between the generic and launchpad entries:

Differences between generic and launchpad entries for TI C2000 MCUs

Processor Differences Default value in generic entryDefault value in LaunchPad

F28002x

  • TI F28002x - Generic entry

  • TI F280025C LaunchPad - LaunchPad entry

CCXML file   
Oscillator clock frequency Internal oscillator 10Mhz clockExternal oscillator 20Mhz clock
Default GPIO entry for   
  • ePWM 3B

  • eQEP1I

  • I2C_A SDA and SCL

  • SPI_A PICO, POCI and chip select

  • SPI_B PICO, POCI, CLK and chip select

  • CAN A TX and RX

  • 5

  • 23

  • 32 and 33

  • 16, 17 and 11

  • 24, 25, 26 and 27

  • 31 and 30

  • 15

  • 31

  • 35 and 37

  • 11, 10 and 5

  • 30, 31, 22 and 33

  • 32 and 33

F28003x

  • TI F28003x - Generic entry

  • TI F280039C LaunchPad - LaunchPad entry

CCXML file   
Default GPIO entry for   
  • ePWM 5A and 5B

  • eQEP1I

  • eQEP2A, 2B and 2I

  • SCI_B TX and RX

  • I2C_A SDA and SCL

  • SPI A PICO and chip select

  • SPI_B PICO, POCI and CLK

  • CAN A TX and RX

  • 8 and 9

  • 23

  • 24, 25 and 26

  • 9 and 11

  • 32 and 33

  • 16 and 11

  • 24, 25 and 26

  • 31 and 30

  • 16 and 35

  • 24

  • 14, 55 and 57

  • 56 and 15

  • 19 and 18

  • 8 and 5

  • 60, 61 and 58

  • 4 and 5

F28004x

  • TI F28004x - Generic entry

  • TI F280049C LaunchPad - LaunchPad entry

CCXML file   
Default GPIO entry for   
  • eQEP1A, 1B and 1I

  • eQEP2A and 2B

  • I2C_A SDA and SCL

  • SCI_B TX and RX

  • SPI_A CLK and chip select

  • SPI_B POCI and CLK

  • CAN A RX

  • 40, 57 and 31

  • 24 and 25

  • 35 and 37

  • 9 and 11

  • 9 and 11

  • 25 and 26

  • 30

  • 35, 37 and 59

  • 14 and 15

  • 32 and 33

  • 40 and 13

  • 56 and 57

  • 31 and 22

  • 33

F2837xD

  • TI F2837xD - Generic entry

  • TI F28379D LaunchPad - LaunchPad entry

CCXML file   
External oscillator frequency 20Mhz 00Mhz
Default GPIO entry for   
  • eCAP 1 - 6

  • eQEP1I

  • eQEP2A, eQEP2B and eQEP2I

  • I2C_A SDA and SCL

  • I2C_B SDA and SCL

  • SCI_A baud rate

  • SCI_A TX and RX

  • SCI_B TX and RX

  • SCI_C TX and RX

  • SPI_A PICO, POCI, CLK and chip select

  • SPI_B PICO, POCI, CLK and chip select

  • SPI_C PICO, POCI, CLK and chip select

  • CAN_B TX and RX

  • 24, 25, 26, 20, 21, 23

  • 23

  • 24, 25 and 26

  • 32 and 33

  • 34 and 35

  • 115200

  • 29 and 28

  • 9 and 11

  • 12 and 13

  • 16, 17, 18 and 19

  • 24, 25, 26 and 27

  • 123, 124, 125, 126

  • 8 and 10

  • 20, 21, 99, 54, 55, 57

  • 99

  • 54, 55 and 57

  • 104 and 105

  • 40 and 41

  • 5e6

  • 42 and 43

  • 18 and 19

  • 56 and 139

  • 58, 59, 60 and 61

  • 63, 64, 65 and 66

  • 100, 101, 102, 103

  • 12 and 17

F2806x

  • TI F2806x - Generic entry

  • TI F28069M LaunchPad - LaunchPad entry

Default GPIO entry for   
  • eCAP1

  • SCI_B TX and RX

  • SPI_B PICO, POCI and chip select

  • eQEP2A, 2B and 2I

  • SCI_A baud rate

  • 5

  • 9 and 11

  • 12, 13 and 15

  • 24, 25 and 26

  • 115200

  • 19

  • 58 and 15

  • 24, 25 and 27

  • 54, 55 and 56

  • 5.625e6

F280013x

  • TI F280013x - Generic entry

  • TI F2800137 LaunchPad - LaunchPad entry

CCXML  
Default GPIO entry for  
  • ePWM5 GPIO

  • eQEP1A, eQEP1B and eQEP1I GPIO

  • I2C_B SDA and SCL GPIO

  • SPI_A PICO, CLK and chip select

  • eCAN_A Tx and Rx GPIO

  • 8 and 9

  • 20, 21 and 23

  • 34 and 51

  • 16, 12 and 11

  • 37 and 35

  • 16 and 35

  • 40, 41 and 39

  • 2 and 3

  • 8, 9 and 5

  • 4 and 5

F28P65x

  • TI F28P65x - Generic entry

  • TI F28P650D LaunchPad - LaunchPad entry

Note

The memory configuration on F28P65x devices differs slightly from its predecessors. F28P65x devices have five flash banks that you can allocate to either CPU1 or CPU2. Additionally, CPU1 or CLA can use the LS RAM, while RAM Dx memory can be mapped to either CPU1 or CPU2. For more information, see F28P65x Memory Configuration.

CCXML   
External oscillator frequency 20Mhz 25Mhz
Default GPIO entry for   
  • ePWM 8A and 8B

  • eQEP1S

  • eQEP2A, eQEP2B and eQEP2I

  • I2C_A SDA and SCL

  • SCI_A Tx and Rx

  • SCI_B Tx and Rx

  • SPI_A chip select

  • eCAN_A Tx and Rx

  • 14 and 15

  • 22

  • 54, 55 and 57

  • 32 and 33

  • 29 and 28

  • 9 and 11

  • 19

  • 31 and 30

  • 99 and 75

  • 12

  • 24, 79 and 103

  • 104 and 105

  • 42 and 43

  • 38 and 55

  • 57

  • 37 and 36

F28P55x

  • TI F28P55x - Generic entry

  • TI F28P550D LaunchPad - LaunchPad entry

CCXML  
Default GPIO entry for  
  • ePWM5 GPIO

  • eQEP1A, eQEP1B and eQEP1I GPIO

  • SCI_B Tx and Rx GPIO

  • SPI_A PICO, CLK and chip select

  • SPI_B PICO, POCI and CLK

  • MCAN_A Tx and Rx GPIO

  • MCAN_B Tx and Rx GPIO

  • 8 and 9

  • 20, 21 and 23

  • 9 and 11

  • 16, 12 and 11

  • 24, 25 and 26

  • 31 and 30

  • 2 and 3

  • 37 and 35

  • 40, 41 and 59

  • 56 and 15

  • 8, 9 and 17

  • 60, 61 and 14

  • 4 and 5

  • 58 and 33

The ccxml file is necessary to download the executable onto the target device and defines the connection with the debugger.

The COM port is used for serial communication. Once chosen, the COM port for a particular target is saved as a preference and automatically applied.

Note

  • Early versions of the TI F2838x controlCARDs (MCU063E1, MCU063E2, MCU063A) use a 20 MHz external clock. The newer TI F2838x controlCARDs (versions MCU063B and later) use a 25 MHz external clock. The default clock for the TI F2838x target is set to a 10 MHz internal clock to accommodate all variants. However, you can change the clock under Configuration Parameters > Hardware Implementation > Target hardware resources > Clocking by disabling the Use internal oscillator parameter and setting the correct external clock frequency in the Oscillator clock (OSCCLK) frequency in MHz parameter.

  • The memory configuration on F28P65x devices differs slightly from its predecessors. F28P65x devices have five flash banks that you can allocate to either CPU1 or CPU2. Additionally, CPU1 or CLA can use the LS RAM, while RAM Dx memory can be mapped to either CPU1 or CPU2. For more information, see F28P65x Memory Configuration.

See Also

| |