Mixed-Signal Blockset™ provides models of components and impairments, analysis tools, and test benches for designing and verifying mixed-signal integrated circuits (ICs).
You can model PLLs, data converters, and other systems at different levels of abstraction and explore a range of IC architectures. You can customize models to include impairments such as noise, nonlinearity, and quantization effects, and refine the system description using a top-down methodology.
Using the test benches provided, you can verify system performance and improve modeling fidelity by fitting measurement characteristics or circuit-level simulation results. Rapid system-level simulation using variable-step Simulink® solvers lets you debug the implementation and identify design flaws before simulating the IC at the transistor level.
With Mixed-Signal Blockset you can simulate mixed-signal components together with complex DSP algorithms and control logic. As a result, both analog and digital design teams can work from the same executable specification.
This example shows how to design a simple phase-locked loop (PLL) using a reference architecture and validate it using PLL Testbench.
This example shows how to measure and analyze the effect of phase noise in a voltage controlled oscillator (VCO).
This example shows how to design a SAR ADC using reference architecture and validate the ADC using ADC Testbench.