CDSP Peripheral Configuration
Description
View and edit the map of peripherals in the Infineon® AURIX™ model to the hardware peripherals.
Using the Hardware Mapping tool, you can:
View and edit configuration parameters for CDSP peripheral block.
Check for any conflicts between the peripherals.
Open the CDSP Peripheral Configuration
In the Hardware tab of the Simulink® mode, click Hardware Mapping.
Parameters
DSP Core
— DSP core for processing
Core-0
(default) |
Core-0
to Core-17
Select the DSP core from the list of supported cores.
Timestamp frequency scaling
— Frequency scaling for the ADC frequency
/4
(default) |
/8
|
/16
|
/32
Specify the division factor for the clock frequency used in the ADC.
Dependencies
To enable this parameter, select the Enable timestamp output parameter in the CDSP block in the Simulink model.
Gate source to trigger timestamp
— Hardware trigger source
GTM - ATOM0
(default) |
GTM - TOM#
|
GTM - ATOM#
|
EGTM - TOM#
|
EGTM - ATOM#
Specify the source of the gate signal to trigger the timestamp.
Note
You must configure the appropriate trigger from the PWM block with a rate
(1/initial clock frequency of PWM) that is greater than the conversion time
of the filtered data output. Calculate this conversion time as |Size of
filtered data x clock cycles / FADC|. For the filter
chain FC0
with analog to digital conversion
frequency (FADC) of 160 MHz, 128 filter taps, and a
decimation rate of 1, it requires 249 clock cycles to output correct
filtered data.
Dependencies
To enable this parameter, select the Enable timestamp parameter in the CDSP block in the Simulink model.
Hardware Trigger
— Hardware trigger for timestamp
Adc_TriggerSignal_0
(default) |
Adc_TriggerSignal_1
|
Adc_TriggerSignal_2
| Adc_TriggerSignal_3
Specify the hardware trigger for the timestamp.
Dependencies
To enable this parameter, select the Enable timestamp parameter in the CDSP block in the Simulink model.
Trigger edge
— Hardware trigger edge for timestamp
Rising-edge
(default) |
Disable
|
Falling-edge
|
Both-edge
Select the type of hardware trigger edge to trigger the timestamp.
Dependencies
To enable this parameter, select the Enable timestamp parameter in the CDSP block in the Simulink model.
Trigger delay in ns (0:65535)
— Gate trigger delay for timestamp
0
(default) | scalar in the range (0, 65535)
Specify the gate trigger delay for the timestamp.
Dependencies
To enable this parameter, select the Enable timestamp parameter in the CDSP block in the Simulink model.
Lower limit in volts (-5V to 5V)
— Lower limit for the boundary band
0
(default) | scalar in the range (-5, 5)
Set the lower limit of the boundary band to check the result.
Upper limit in volts (-5V to 5V)
— Upper limit for the boundary band
5
(default) | scalar in the range (-5, 5)
Set the upper limit of the boundary band to check the result.
Enable hysteresis on boundary flag
— Option to enable hysteresis on boundary flag
off
(default) | on
Enable hysteresis to avoid metastable states and switching due to internal ground bounce.
Boundary mode
— Activate boundary flag based on boundary band limits
Disabled
(default) | Exceeds upper limit
| Lower than lower limit
| Out of bound
Activate boundary flag based on the boundary band limits.
Dependencies
To enable this parameter, disable the Enable hysteresis on boundary flag parameter.
Service request
— Service request based on the boundary mode
None
(default) | Inside boundary band
| Outside boundary band
| Out of bound
Service request based on the boundary mode.
Window gate source
— Hardware trigger source for integration window
GTM-ATOM0
(default) | GTM-ATOM#
| GTM-TOM#
Specify the hardware trigger source for integration in data accumulation (DA) filter block.
Hardware trigger
— Hardware trigger for integrator
Adc_TriggerSignal_0
(default) | Adc_TriggerSignal_#
Specify the hardware trigger for integration in DA filter block.
Note
Configure the ADC trigger from the PWM block. The Module, Timer submodule, Timer unit, and Trigger Channel parameter values in PWM Peripheral Configuration must match the values of Window gate source and Hardware trigger parameters.
Trigger edge
— Hardware trigger edge for integrator
Rising-edge
(default) | Falling-edge
| Both-edges
Hardware trigger edge for integration in DA filter block.
Trigger delay in nano seconds
— Trigger delay for integrator
0
(default) | 0
to 6553500
Specify the trigger delay for integration in DA filter block.
Enable interrupt
— Option to enable result interrupt
off
(default) | on
Select this parameter to enable result interrupt.
Interrupt
— Interrupt condition for filtered result
Always
(default) | Only while gate is high
| Only while gate is low
Interrupt condition for the filtered result
Gate signal from
— Source of gate signal
GTM-ATOM0
(default) | GTM-ATOM#
| GTM-TOM#
Source of the gate signal to trigger the filtered result.
Note
Ensure that you have configured the appropriate trigger using the PWM block.
Hardware trigger
— Hardware trigger for filtered result
Adc_TriggerSignal_0
(default) | Adc_TriggerSignal_1
| Adc_TriggerSignal_2
| Adc_TriggerSignal_3
Specify hardware trigger for the filtered result.
Trigger delay (0, 65535)
— Trigger delay for the filtered result
0
(default) | scalar in the range (0, 65535)
Specify trigger delay for the filtered result.
Enable interrupt
— Option to enable timestamp interrupt
off
(default) | on
Select this parameter to enable the timestamp interrupt.
Dependencies
To enable this parameter, select the Enable timestamp parameter in the CDSP block in the Simulink model.
Version History
Introduced in R2024a
See Also
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