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CDSP Peripheral Configuration

Map CDSP peripherals in the model to peripheral registers in the MCU

Since R2024a

Description

View and edit the map of peripherals in the Infineon® AURIX™ model to the hardware peripherals.

Using the Hardware Mapping tool, you can:

  • View and edit configuration parameters for CDSP peripheral block.

  • Check for any conflicts between the peripherals.

CDSP peripheral

Open the CDSP Peripheral Configuration

In the Hardware tab of the Simulink® mode, click Hardware Mapping.

Hardware Mapping CDSP

Parameters

expand all

Configuration

Select the DSP core from the list of supported cores.

Timestamp

Specify the division factor for the clock frequency used in the ADC.

Dependencies

To enable this parameter, select the Enable timestamp output parameter in the CDSP block in the Simulink model.

Specify the source of the gate signal to trigger the timestamp.

Note

You must configure the appropriate trigger from the PWM block with a rate (1/initial clock frequency of PWM) that is greater than the conversion time of the filtered data output. Calculate this conversion time as |Size of filtered data x clock cycles / FADC|. For the filter chain FC0 with analog to digital conversion frequency (FADC) of 160 MHz, 128 filter taps, and a decimation rate of 1, it requires 249 clock cycles to output correct filtered data.

Dependencies

To enable this parameter, select the Enable timestamp parameter in the CDSP block in the Simulink model.

Specify the hardware trigger for the timestamp.

Dependencies

To enable this parameter, select the Enable timestamp parameter in the CDSP block in the Simulink model.

Select the type of hardware trigger edge to trigger the timestamp.

Dependencies

To enable this parameter, select the Enable timestamp parameter in the CDSP block in the Simulink model.

Specify the gate trigger delay for the timestamp.

Dependencies

To enable this parameter, select the Enable timestamp parameter in the CDSP block in the Simulink model.

Boundary

Set the lower limit of the boundary band to check the result.

Set the upper limit of the boundary band to check the result.

Enable hysteresis to avoid metastable states and switching due to internal ground bounce.

Activate boundary flag based on the boundary band limits.

Dependencies

To enable this parameter, disable the Enable hysteresis on boundary flag parameter.

Service request based on the boundary mode.

Integrator Control

Specify the hardware trigger source for integration in data accumulation (DA) filter block.

Specify the hardware trigger for integration in DA filter block.

Note

Configure the ADC trigger from the PWM block. The Module, Timer submodule, Timer unit, and Trigger Channel parameter values in PWM Peripheral Configuration must match the values of Window gate source and Hardware trigger parameters.

Hardware trigger edge for integration in DA filter block.

Specify the trigger delay for integration in DA filter block.

Events > Result Interrupt

Select this parameter to enable result interrupt.

Interrupt condition for the filtered result

Source of the gate signal to trigger the filtered result.

Note

Ensure that you have configured the appropriate trigger using the PWM block.

Specify hardware trigger for the filtered result.

Specify trigger delay for the filtered result.

Events > Timestamp

Select this parameter to enable the timestamp interrupt.

Dependencies

To enable this parameter, select the Enable timestamp parameter in the CDSP block in the Simulink model.

Version History

Introduced in R2024a

See Also