回答済み
In VHDL or Verilog, Can any one let me know how to implement 1) for loop , 2) nested for loop 3) RAM or ROM of desired size , thanking you in aticipation
It seems as if you are asking basic HDL language questions. if so, this is the wrong venue to look for such answers. If you ...

12年以上前 | 0

回答済み
error in generating the HDL code from the matlab code
As the error message states, you can't use dynamic typed data for HDL code generation. Each data variable needs to have a speci...

12年以上前 | 0

| 採用済み

回答済み
image algo to vhdl conversion
The function you wish to generate HDL for contains two function calls (imread and im2bw), and neither function is supported for ...

12年以上前 | 1

| 採用済み

回答済み
Problem in hdl coder
You don't mention which release you are using, but try this process: # Close HDL Coder completely, leaving MATLAB open # Run...

12年以上前 | 0

| 採用済み

回答済み
Simulink block for switching: Multiport switch block not supported in HDL Coder
As the error message states, the 'Specify Indices' mode of the MultiPort Switch block is not supported for HDL code generation. ...

12年以上前 | 0

| 採用済み

回答済み
How to create a FFT ipcore for Zynq using Simulink HDL Coder?
A frame-based block takes an entire array of data as an input in one time step. This is not very hardware friendly; for hardwar...

12年以上前 | 0

| 採用済み

回答済み
Coverstion of Matlab code to HDL
There are several obvious functions in your code that are not supported for HDL code generation. At first glance, the following ...

12年以上前 | 0

回答済み
HDL Coder: how to divide (eg, 1/3) using simulink when the divisor is not 2^x
Certain synthesis tools do not support division of arbitrary numbers; this is why you are encountering this restriction. The mos...

12年以上前 | 2

| 採用済み

回答済み
MATLAB model to verilog HDL code conversion using Matlab's HDL workflow advisor
The contents of |hdllib| are the only blocks supported for HDL code generation. You mention a MOSFET power module. That block de...

12年以上前 | 0

回答済み
How to convert this MATLAB code to HDL using HDL Coder
Your first step will be read the documentation for HDL Coder and walk through the tutorial examples provided. This will introduc...

12年以上前 | 1

回答済み
I am using MATLAB R2011a, am getting error in HDL workflow advisor Set target interface, FPGA pin specification.
You cannot use MATLAB numeric array syntax here; as the error message states, you have to specify each pin number as a string, c...

12年以上前 | 0

回答済み
Does step input block or clock block in Simulink Sources block supported by HDL Coder?
The short answer: neither block you mention can have HDL code generated for it by HDL Coder. A model destined for HDL code ge...

12年以上前 | 0

| 採用済み

回答済み
HDL Coder (Path Error)
The path in this error message is the MATLAB path. Are you calling a function named func_sum from within your design? Is this a...

12年以上前 | 0

回答済み
unable to generate HDL code with Matlab 2011a
Support for HDL Code Generation from MATLAB code was not added to HDL Coder until R2012a. See the <http://www.mathworks.com/help...

12年以上前 | 1

| 採用済み

回答済み
HDL Coder in Matlab 2013
HDL Coder is a separately licensed MathWorks product. To find out if you have the software installed and licensed, use the 'ver'...

12年以上前 | 0

| 採用済み

回答済み
Does Matlab HDL Verifier support Simulink SimPowerSystems' blocks?
As long as the SimPowerSystems blocks are outside the FIL subsystem, then what you want to do should work.

12年以上前 | 0

| 採用済み

回答済み
HDL Coder Example - Problem
These scripts are part of the published examples that are shipped with HDL Coder. The demo is set up to have you copy the prewri...

12年以上前 | 0

回答済み
Converting *.fis file from Fuzzy logic toolbox to VHDL using system generator or other application
MathWorks' HDL Coder product does not support the Fuzzy Logic Toolbox. To the best of my knowledge, neither does Xilinx System G...

13年弱前 | 0

回答済み
HDL code generation in matlab
I would make sure that your code runs correctly in MATLAB first. Once this is the case, take a look at your use of MATLAB built-...

13年弱前 | 0

回答済み
Is Stateflow not supported for Xilinx HDL code generation
From the error message it seems that you are trying to use Xilinx target library support. Is this intentional? This is control...

13年弱前 | 0

| 採用済み

回答済み
Errors : algebraic loop in use HDL simulink coder
The error message states you have an algebraic loop in your design. Basically, an algebraic loop is a path in your Simulink mod...

13年弱前 | 0

回答済み
Not getting desired waveform when using the hdl supported free running counter
The HDL Counter has (among other mask parameters) initial value, step value, and count to value. I think you are confusing the ...

13年弱前 | 0

| 採用済み

回答済み
What this error means:"Unexpected HDL Coder call to hdlentitysignalsinit" in call to fdhdltool(Hd)
This is an internal error with Filter Coder. Please open a technical support issue with MathWorks.

13年弱前 | 0

| 採用済み

回答済み
How can I generate VHDL code with fixed point values from matlab code?
Are you generating code from a MATLAB Function block in Simulink, or from MATLAB code directly? If you are generating HDL direct...

13年弱前 | 1

回答済み
Steps for converting hilbert transform matlab code to vhdl
You will need the HDL Coder product to accomplish this. It can be done with either a MATLAB or Simulink design. For Simulin...

13年弱前 | 1

回答済み
HDL Coder: Problems with saturation after a product block with divide
I don't think this has anything to do with your Saturation block. The issue lies with the Product block. As the message says, yo...

13年弱前 | 0

| 採用済み

回答済み
How to generate synthesizable VHDL from Simulink block?
If you do not want real numbers in your generated HDL code, you need to retype (in Simulink) all the doubles you have in your Si...

13年弱前 | 0

| 採用済み

回答済み
Need help for Error happened during using SIMULINK HDL coder
If you are starting with MATLAB code and not a Simulink model, I would suggest using HDL Coder to generate VHDL directly from yo...

13年弱前 | 0

| 採用済み

回答済み
How to creat many HDL blocks at one time
If I understand your question properly, all you need to do is place your three blocks inside a subsystem, and generate HDL code ...

13年弱前 | 0

回答済み
Error beetween two methods: Simulink and Verilog(after convert by HDL coder)
It looks like the two waveforms are identical, but time-shifted. Often Simulink HDL Coder will need to insert latency into the ...

13年弱前 | 0

| 採用済み