Run Incremental Simulation

In the Parallel Link Designer app, you can use the Incremental option in the Simulation Mode parameter of the Post-Layout Verification tab. This allows you to run simulations on additional nets without deleting the existing simulations. For example, if you have already simulated an address bus but not the clock, you can just simulate the clock without having to re-run the address buss simulations.

In the default, non-incremental mode, the app deletes all previous simulation files before running the new simulations. When you run the simulations in the incremental mode, an additional column (Simulate Incrementally) in the main table indicates whether a net is included in the list for nets to simulate incrementally.

In the Incremental mode, the Generate Spice and Run Spice steps use the nets included for incremental simulation. Waveform Analysis and Timing Analysis are run for nets included in non-incremental mode.

You can also turn on the Incremental mode from the Post-layout SI/Timing Simulation dialog box.

Related Topics

• Post-Layout Verification of Parallel Link