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Boost Power Train Design Workflow

This example shows how to design a power supply with a boost power train for a specific operating point, control the output voltage, and perform time-domain simulations.

The boost power train circuit topology converts an input DC voltage to a higher DC output voltage with the same polarity. You can design the boost power train for a specified operating point or range of operating points. You can also design a Type III compensator to control the output voltage, and simulate the behavior of the power supply in dynamic conditions.

This example uses the boost power train circuit shown in the schematic diagram below and described in the netlist file BoostPowerTrain.sp .

Operating Point Analysis

Use the configuration file BoostPowerTrain_Cfg1.mat included with this example to configure and run the operating point analysis. The output data is contained in the file BoostPowerTrain_Cfg1Out.mat . For more information on how to design the power train and analyze its performance under steady state operating conditions, see Boost Power Train Operating Point Analysis. The DcResults table in this file also contains the metrics added through the post-processing script getPowerTrainMetrics attached with the Boost Power Train Operating Point Analysis example.

DC Results Table

ans =

  1x7 table

    Duty Cycle    Frequency    Vg    Iload    Vout    Iout      Ig   
    __________    _________    __    _____    ____    ____    _______

     0.73554        2e+05      5       0       18     1.8     -6.8067

Power Analysis Table

ans =

  1x11 table

    P_Vcntl     P_Vg       P_RL1       P_Rsw      P_Vd       P_Rd        P_R2      P_Vsense    P_Rload    P_Iload     P_total  
    _______    _______    ________    _______    ______    ________    ________    ________    _______    _______    __________

       0       -34.038    0.083544    0.14779    1.2588    0.070117    0.072089       0         32.4         0       -0.0060801

Efficiency and Ripple Metrics

ans =

  1x5 table

    Efficiency    Vin_ripple    Iin_ripple    Vout_ripple    Iout_ripple
    __________    __________    __________    ___________    ___________

     0.95186          0          0.91156       0.058051       0.0058051 

The Waves table in the BoostPowerTrain_Cfg1Out.mat file provides access to all of the steady state voltage and current waveforms in the power train circuit. You can use these waveforms to gain insights into the way the circuit operates. For example, the waveform at the switching node (node 4) of the circuit demonstrates the effect of the switching device and diode on the output voltage of the inductor. When the switching device is turned on, it draws the output voltage of the inductor near to zero, drawing current from the five volt input supply and reverse biasing the diode. During this period the inductor current steadily increases. However, when the switching device is turned off, the output voltage of the inductor rapidly increases to a voltage that is well above the input supply. This event steadily reduces the inductor current and drives the current through the diode and into the load. For this circuit under these particular conditions, the inductor current remains positive and so current continues to be drawn from the input supply and through the diode.

Switching Node Waveforms

t = BoostPowerTrain_Cfg1Out.Waves{1}.Time;
vswitch = BoostPowerTrain_Cfg1Out.Waves{1}.('4');
iL1 = BoostPowerTrain_Cfg1Out.Waves{1}.iL1;
% Inductor output voltage
title('Boost Power Train Switching Node Waveform');
% Inductor current
title('Boost Power Train Inductor Current');

From the operating point analysis and the configuration file BoostPowerTrain_Cfg1.mat you can also build a Simulink® block to model the power train in a time domain simulation. To do this, use the Build Block button in the Linear Circuit Wizard block parameters dialog box. The Power Train block in the BoostPowerSupply Simulink model attached with this example is constructed this way.

Compensator Design

As explained in [1], the small signal response of a boost power train includes a right half plane zero at L/Rload. Therefore, the power supply control loop oscillates unless a Type III compensator is used to introduce additional zeros near the unity gain frequency of the control loop. The compensator increases the phase margin to an acceptable level.

The Type III compensator circuit shown in the schematic below and described in the file TypeIIICompensator.sp is designed using the method given in [1].

You can obtain the poles, zeros, and symbolic model of this circuit and optimize its design by applying the configuration in the file TypeIIICompensator_Cfg1.mat to the method described in Feedback Amplifier Design for Voltage-Mode Boost Converter. The results of the Linear Circuit Wizard analysis are contained the file TypeIIICompensator_Cfg1Out.mat.

TypeIIICompensator_Cfg1PoleZero = 

  struct with fields:

              Poles: [3x1 double]
              Zeros: {[3x1 double]  [3x1 double]}
              Gains: [-138.6741 1.0000e+03]
     InputPortNames: {'Vload'  'Vref'}
    OutputPortNames: {'Vout'}

TypeIIICompensator_Cfg1SymbolicModel = 

  struct with fields:

      As: {3x3 cell}
      Bs: {3x2 cell}
      Cs: {1x3 cell}
      Ds: {'-250*R3^-1'  '250*R3^-1'}
    e11s: {'4*C2*C1*C3 + -1.1302e-11*C1*C3^2 + 1.6366e-07*C3^3'}
    f22s: {'0.25*R3^-1'}

You can also build a Simulink block for the compensator, either from the configuration in TypeIIICompensator_Cfg1.mat or for an optimized compensator that you have designed using the Linear Circuit Wizard block. The Compensator block in the BoostPowerSupply Simulink model is constructed this way.

Time Domain Simulation

To create a time domain simulation of the closed loop behavior of the power supply, combine the power train Simulink block from the operating point analysis with the compensator Simulink block from the controller design and a pulse width modulator (PWM).

The PWM interacts with ripple at the output of the compensator, making details of the PWM definition important. While most analyses ignore any ripple that passes from the output of the power train to the output of the compensator, there can be ripple at the output of the compensator that significantly affects the closed loop behavior of the power supply. Power train output ripple is inherently synchronous with the control signal provided by the PWM. So any delay between the time the PWM derives the width of the next pulse from the compensator output and the time the PWM outputs that pulse increases the delay in the control loop and reduces the phase margin. Ripple at the compensator output also appears to affect the small signal behavior of the control loop in other ways that should be evaluated through analysis of time domain simulation results.

The model BoostPowerSupply enables you to switch between two different PWMs.


The first choice offered is the Simulink PWM block, which reads the output pulse width from the control input on the rising edge of the output pulse. To use this PWM, set the manual switches Switch 1 and Switch 2 in the model to their upper positions. Run this model and compare the steady state outputs of the power train output and the compensator to the output of the PWM. Note that the steady state duty cycle of 0.7355 occurs near the beginning of the ripple cycle and that the ripple voltage increases from there.

Many texts on SMPS specify the PWM circuit shown below explicitly and in detail for voltage controlled operation. Note that in this circuit the falling edge of the PWM output occurs essentially as soon as the sawtooth ramp has become higher than the compensator output.

The other PWM choice in the model BoostPowerSupply uses a MATLAB function block and several unit delay blocks to closely approximate the behavior of this circuit. To use this PWM, set the manual switches Switch 1 and Switch 2 in the model to their lower positions. Run BoostPowerSupply and note that the falling edge of the PWM output occurs at the peak of the compensator output ripple waveform, and that the value at that point is equal to the steady state output duty cycle.


1. S. W. Lee, "Practical Feedback Loop Analysis for Voltage-Mode Boost Converter", Application Report SLVA633, Texas Instruments, January 2014.