DUC and DDC System Objects
You can generate HDL code for Digital Up Converter (DUC) and Digital Down Converter (DDC) System objects. This capability is limited to code generation at the command line only.
generatehdl for a System object™, you must specify the data type of the input signal. Set the
InputDataType property to a
hDDC = dsp.DigitalDownConverter('Oscillator','NCO') generatehdl(hDDC,'InputDataType',numerictype(1,8,7))
The software generates a data valid signal at the top DDC or DUC level:
For DDC, the signal is named
ce_out. Filter Design HDL Coder™ software ties that signal to the corresponding
ce_outsignal from the decimating filtering cascade.
For DUC, the signal is named
ce_out_valid. The coder software ties that signal to the corresponding
ce_out_validsignal from the interpolating filtering cascade.
You cannot set the input and output port names. These ports have the default names of
ddc_out. The coder inserts registers on
input and output signals. If you attempt to turn them off, the coder returns a
You can implement filtering stages in DDC and DUC with the default fully parallel architecture only. For these objects, the coder software does not support optimization and architecture-specific properties such as: